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([178.197.223.104]) by smtp.gmail.com with ESMTPSA id q10-20020a1cf30a000000b003fbb618f7adsm4011911wmq.15.2023.07.28.04.28.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Jul 2023 04:28:52 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Vinod Koul , Bard Liao , Pierre-Louis Bossart , Sanyog Kale , linux-arm-msm@vger.kernel.org, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 2/2] soundwire: qcom: handle command ignored interrupt Date: Fri, 28 Jul 2023 13:28:48 +0200 Message-Id: <20230728112848.67092-2-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230728112848.67092-1-krzysztof.kozlowski@linaro.org> References: <20230728112848.67092-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Message-ID-Hash: MMKVQDEYGYPGIYFYKBGO5Z75QSRO6CRI X-Message-ID-Hash: MMKVQDEYGYPGIYFYKBGO5Z75QSRO6CRI X-MailFrom: krzysztof.kozlowski@linaro.org X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: Qualcomm Soundwire v2.0.0 controller comes with new interrupt bit for ignored commands. Add code to handle it in the interrupt service routine. Signed-off-by: Krzysztof Kozlowski --- drivers/soundwire/qcom.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c index 3ae3e5896308..3061db6adac7 100644 --- a/drivers/soundwire/qcom.c +++ b/drivers/soundwire/qcom.c @@ -61,6 +61,7 @@ #define SWRM_INTERRUPT_STATUS_BUS_RESET_FINISHED_V2 BIT(13) #define SWRM_INTERRUPT_STATUS_CLK_STOP_FINISHED_V2 BIT(14) #define SWRM_INTERRUPT_STATUS_EXT_CLK_STOP_WAKEUP BIT(16) +#define SWRM_INTERRUPT_STATUS_CMD_IGNORED_AND_EXEC_CONTINUED BIT(19) #define SWRM_INTERRUPT_MAX 17 #define SWRM_V1_3_INTERRUPT_MASK_ADDR 0x204 #define SWRM_V1_3_INTERRUPT_CLEAR 0x208 @@ -792,6 +793,17 @@ static irqreturn_t qcom_swrm_irq_handler(int irq, void *dev_id) break; case SWRM_INTERRUPT_STATUS_EXT_CLK_STOP_WAKEUP: break; + case SWRM_INTERRUPT_STATUS_CMD_IGNORED_AND_EXEC_CONTINUED: + ctrl->reg_read(ctrl, + ctrl->reg_layout[SWRM_REG_CMD_FIFO_STATUS], + &value); + dev_err(ctrl->dev, + "%s: SWR CMD ignored, fifo status %x\n", + __func__, value); + + /* Wait 3.5ms to clear */ + usleep_range(3500, 3505); + break; default: dev_err_ratelimited(ctrl->dev, "%s: SWR unknown interrupt value: %d\n",