From patchwork Thu Jan 25 10:31:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Charles Keepax X-Patchwork-Id: 13530374 Received: from mx0b-001ae601.pphosted.com (mx0a-001ae601.pphosted.com [67.231.149.25]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 276FC1CAAC for ; Thu, 25 Jan 2024 10:31:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=67.231.149.25 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706178690; cv=none; b=XObLrPDT4Idd9ZOy2i7R4NjTgENiyZRsP/I2WcWwrj7sPs2Mt4LmEJn6WKKnb6Vug98up+3TdyBC+HTtQg3Kosa+xYruvdCu9O4Xr1+hJT5jNnr1pcqQgj5nUZYFPOUD6A7FcTCd5PHrtyb9deaGyt+QtTDGZBc/qWSobV5WaFg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706178690; c=relaxed/simple; bh=DnL8qyxPAZZwTMxHIG2MKKM+ChzHTpH10rW3atpweQM=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=HlwYuvgvjYb6/NAWGCrqxl4VIMw8djovExKYumgjlBl176q+npezYgQ8l4nl8tZocWBjo56UC6yfCE61lnyWD3hEdSBNDDwuVP+CFsuyg1rF8QRv5R2+IADpOVV7agm2sRvNyDkF6Z2zbkytF9JHuFJWNenESTnbvwW+SZfi3Vw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com; spf=pass smtp.mailfrom=opensource.cirrus.com; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b=SPf5uprr; arc=none smtp.client-ip=67.231.149.25 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=opensource.cirrus.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b="SPf5uprr" Received: from pps.filterd (m0077473.ppops.net [127.0.0.1]) by mx0a-001ae601.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 40P6oFQ5010841; Thu, 25 Jan 2024 04:31:20 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= PODMain02222019; bh=2nE2uB7fXFPU8yKpy9Qhz0K5Jd5tNvY/0Pf9AeiGvv0=; b= SPf5uprrX9nVIEjL0+VWYcIqrr9qnucaQgRXdcKHS0hXAwwIsVXmsST9X4w7CLiv Gmnsx3k0U1AdaOgCmgZfEmzgJN2c8N6McHgh0pvjLUpNnB2EzEdxdhK9wtO0i486 1Zlm8ijy1d3Zjz9AsOkPdSxE/MvmawDTWC69Di8nBODScS7qOm/LbXJjTOoODgg4 9wjZq9Usp/4YEkog3hgMRhxtkhkFNT6DvDYRMZdwb7Sy97M6qUJDlWa1Ute0GCjO OTfgeIsc4eN19qsdRiUFEQjg2q37XMncakVIETQD6GJuR+ZgzDlG+8EFM3Xt4bfA 38t2oGQisz6uf2YxIIVF2w== Received: from ediex02.ad.cirrus.com ([84.19.233.68]) by mx0a-001ae601.pphosted.com (PPS) with ESMTPS id 3vtmfhj3jp-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 25 Jan 2024 04:31:20 -0600 (CST) Received: from ediex01.ad.cirrus.com (198.61.84.80) by ediex02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Thu, 25 Jan 2024 10:31:17 +0000 Received: from ediswmail9.ad.cirrus.com (198.61.86.93) by ediex01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40 via Frontend Transport; Thu, 25 Jan 2024 10:31:17 +0000 Received: from ediswws07.ad.cirrus.com (ediswws07.ad.cirrus.com [198.90.208.14]) by ediswmail9.ad.cirrus.com (Postfix) with ESMTP id 9D61E82024B; Thu, 25 Jan 2024 10:31:17 +0000 (UTC) From: Charles Keepax To: CC: , , , , Subject: [PATCH v2 6/7] ASoC: cs42l43: Refactor to use for_each_set_bit() Date: Thu, 25 Jan 2024 10:31:16 +0000 Message-ID: <20240125103117.2622095-6-ckeepax@opensource.cirrus.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240125103117.2622095-1-ckeepax@opensource.cirrus.com> References: <20240125103117.2622095-1-ckeepax@opensource.cirrus.com> Precedence: bulk X-Mailing-List: linux-sound@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: -pT4GVl0oVzOXTT5zO8ymtKoZoS1uS-W X-Proofpoint-GUID: -pT4GVl0oVzOXTT5zO8ymtKoZoS1uS-W X-Proofpoint-Spam-Reason: safe Refactor the code in cs42l43_mask_to_slots() to use for_each_set_bit(). Suggested-by: Andy Shevchenko Signed-off-by: Charles Keepax --- Changes since v1: - Added () after funcs in commit message - Use BITS_PER_TYPE - Pass size into cs42l43_mask_to_slots() Thanks, Charles sound/soc/codecs/cs42l43.c | 35 ++++++++++++++++++++--------------- 1 file changed, 20 insertions(+), 15 deletions(-) diff --git a/sound/soc/codecs/cs42l43.c b/sound/soc/codecs/cs42l43.c index 1852cb072bd0e..23e9557494afa 100644 --- a/sound/soc/codecs/cs42l43.c +++ b/sound/soc/codecs/cs42l43.c @@ -6,10 +6,12 @@ // Cirrus Logic International Semiconductor Ltd. #include +#include #include #include #include #include +#include #include #include #include @@ -547,23 +549,22 @@ static int cs42l43_asp_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) return 0; } -static void cs42l43_mask_to_slots(struct cs42l43_codec *priv, unsigned int mask, int *slots) +static void cs42l43_mask_to_slots(struct cs42l43_codec *priv, unsigned long mask, + int *slots, unsigned int nslots) { - int i; + int i = 0; + int slot; - for (i = 0; i < CS42L43_ASP_MAX_CHANNELS; ++i) { - int slot = ffs(mask) - 1; - - if (slot < 0) + for_each_set_bit(slot, &mask, BITS_PER_TYPE(mask)) { + if (i == nslots) { + dev_warn(priv->dev, "Too many channels in TDM mask: %lx\n", + mask); return; + } - slots[i] = slot; - - mask &= ~(1 << slot); + slots[i++] = slot; } - if (mask) - dev_warn(priv->dev, "Too many channels in TDM mask\n"); } static int cs42l43_asp_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, @@ -580,8 +581,10 @@ static int cs42l43_asp_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mas rx_mask = CS42L43_DEFAULT_SLOTS; } - cs42l43_mask_to_slots(priv, tx_mask, priv->tx_slots); - cs42l43_mask_to_slots(priv, rx_mask, priv->rx_slots); + cs42l43_mask_to_slots(priv, tx_mask, priv->tx_slots, + ARRAY_SIZE(priv->tx_slots)); + cs42l43_mask_to_slots(priv, rx_mask, priv->rx_slots, + ARRAY_SIZE(priv->rx_slots)); return 0; } @@ -2098,8 +2101,10 @@ static int cs42l43_component_probe(struct snd_soc_component *component) snd_soc_component_init_regmap(component, cs42l43->regmap); - cs42l43_mask_to_slots(priv, CS42L43_DEFAULT_SLOTS, priv->tx_slots); - cs42l43_mask_to_slots(priv, CS42L43_DEFAULT_SLOTS, priv->rx_slots); + cs42l43_mask_to_slots(priv, CS42L43_DEFAULT_SLOTS, priv->tx_slots, + ARRAY_SIZE(priv->tx_slots)); + cs42l43_mask_to_slots(priv, CS42L43_DEFAULT_SLOTS, priv->rx_slots, + ARRAY_SIZE(priv->rx_slots)); priv->component = component; priv->constraint = cs42l43_constraint;