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Fri, 5 Apr 2024 03:43:11 -0700 From: Sameer Pujar To: , , CC: , , , , , , Sameer Pujar , Subject: [RESEND PATCH v2] ASoC: tegra: Fix DSPK 16-bit playback Date: Fri, 5 Apr 2024 10:43:06 +0000 Message-ID: <20240405104306.551036-1-spujar@nvidia.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-sound@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF0000B370:EE_|DS0PR12MB8198:EE_ X-MS-Office365-Filtering-Correlation-Id: feccb9b3-a9e6-499c-424f-08dc555d35a8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: L8AhV+yoiS6+Z+/+Zm65eJLdN+aM7+Hxc++f90ga3Mx9VqgfOakxSM7vTqJj2k2u/nl/n5ZHW+/Hd8SkChn6oNAfdMKiNeSUgEu12vWTTBD7zqCx+eT4GWtY37wF+LMLBvsLt75qQ5wjkbzsNpZRZYOdn/qLtD80JOVAydzKhWQBd/3QNM76WeCdnVjwPE/lmtmvOBYoivrwWfyK8L1Dz3O8FeJXrmOMVszoVzKi3rousJVmLEA9R09nda6ZA0RWjTGgQj86npfKFdDKWCF/mGPF40Yw+g3gi3P1ZyIOIlAwJHv+j5G24uHoD3hsM0k/6jtJGe4xlEPIEcaaOVrDcHnZUj93Kws2VK/NKeBVlHCvAjgWMKHLk8WdTQihiFMviVgylv/ZM8zDv5KiRqrBK411sulmkugTV64V6dfJFQjESk8fJEoFRpbAHvDb7Ex5rev1yS5P6+p6omVlfeW3ZjLuSsO7RjHXBGZPd5Aw1Nx9sfdBI4oiZn9tqp8mMWs4fyqm5xc4vZonyC1SmD79KEcCgiP8i80igi0KmRAEQ8OclXopy1GEJUqF4VTTJ+5c4i3fjrB8nmDY0Dol3T316R48bO6FhNXX6zatj3aYC+eQgVH/qBHu5nyHJW5yYBBNXsOyZp/SdulUWvmps8+LAFsKMCwSGVZ2RGTUzNXf4hJPObxO0d0T/8450eB6BPNZ1qjqBizfNTSmBK2565xv9XreDNfp+XW0rPv09Y/GSJSftbQuxGg/wabjE/VMFmPz X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230031)(376005)(82310400014)(36860700004)(1800799015);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Apr 2024 10:43:19.8275 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: feccb9b3-a9e6-499c-424f-08dc555d35a8 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B370.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8198 DSPK configuration is wrong for 16-bit playback and this happens because the client config is always fixed at 24-bit in hw_params(). Fix this by updating the client config to 16-bit for the respective playback. Fixes: 327ef6470266 ("ASoC: tegra: Add Tegra186 based DSPK driver") Cc: stable@vger.kernel.org Signed-off-by: Sameer Pujar Acked-by: Thierry Reding --- changes in v2: * moved common setting to S32_LE switch case. sound/soc/tegra/tegra186_dspk.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/sound/soc/tegra/tegra186_dspk.c b/sound/soc/tegra/tegra186_dspk.c index aa37c4ab0adb..21cd41fec7a9 100644 --- a/sound/soc/tegra/tegra186_dspk.c +++ b/sound/soc/tegra/tegra186_dspk.c @@ -1,8 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved. // // tegra186_dspk.c - Tegra186 DSPK driver -// -// Copyright (c) 2020 NVIDIA CORPORATION. All rights reserved. #include #include @@ -241,14 +240,14 @@ static int tegra186_dspk_hw_params(struct snd_pcm_substream *substream, return -EINVAL; } - cif_conf.client_bits = TEGRA_ACIF_BITS_24; - switch (params_format(params)) { case SNDRV_PCM_FORMAT_S16_LE: cif_conf.audio_bits = TEGRA_ACIF_BITS_16; + cif_conf.client_bits = TEGRA_ACIF_BITS_16; break; case SNDRV_PCM_FORMAT_S32_LE: cif_conf.audio_bits = TEGRA_ACIF_BITS_32; + cif_conf.client_bits = TEGRA_ACIF_BITS_24; break; default: dev_err(dev, "unsupported format!\n");