From patchwork Tue Apr 30 08:52:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "D, Lakshmi Sowjanya" X-Patchwork-Id: 13648501 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EEB411A0AF1; Tue, 30 Apr 2024 08:53:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714467190; cv=none; b=MH2wGWwgYwFb6O7x9WgQufZtD8JqUb/v1RSrsmpSVfbUAB0BG3LSXEoe/35fTb6IJpk1o8LA4v8zJk+DSpiAcDNbsswNBsICMl+IPLd29y0zLoSAmYqd/2h1IiTihljbv8+7sOjZf9x1CYSGoWqEc7KxRsAoYLHxPgPdjic8xy8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714467190; c=relaxed/simple; bh=HhiHRgci3Va8aKNan0May3SRjgE/9ME923IgJ2nLvxI=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=WyxurLzKi7yVTODWqqm+1Sl8UtK2Z0R3jZNri8ql9EPGG6LGsR+Xcm+ickMEEHw/sS+FLqocTJDOzDAIyh/J3pgcrwCqlPO0a4Zhk89H0ZtXWWwE1opcf7IgNLA9Tk3jipd/KkFBdcTUGZSAwp9RwrcYRUu4L8w1i43Gy2droJQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=JCbgjWX1; arc=none smtp.client-ip=198.175.65.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="JCbgjWX1" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1714467190; x=1746003190; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=HhiHRgci3Va8aKNan0May3SRjgE/9ME923IgJ2nLvxI=; b=JCbgjWX1/+RHUIK5pOV+IgRo1HZ1g0W5PSqDB0OmFlS27zEAh5EyNsID lJhDakbRTpY9KVVI3bsaqNpjBIcHXATtXITHna+leqlt5DtlbBLr/0/Kf f9+Eehq2yqrBgZRNeE2ImMUQzAT0Cai04Zl6G/0nPkBB1W6WCOFb7ei6N 6mzsJUkyJQuhfY2OwbIWHfNzkYo/UAjLAqblZyShEErj31H6FrCe5ryup xmMKOXTcZQIswJie0X1qB1I7BbQDLW1lplSAmN14W+NK6ZsQj7tYPxBIk rKDgx+S22OWDC3ePODQBQg9dFkt3aZhhoh30Ex7wPyChr8BP09AxBrQJI A==; X-CSE-ConnectionGUID: 9qLb6SVVQ62wF5C/zjmQ4Q== X-CSE-MsgGUID: H9wxpBG0SNWZrXTITvcxIg== X-IronPort-AV: E=McAfee;i="6600,9927,11059"; a="21311394" X-IronPort-AV: E=Sophos;i="6.07,241,1708416000"; d="scan'208";a="21311394" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2024 01:53:08 -0700 X-CSE-ConnectionGUID: qWWsGJAeS5y72tJeuh5wew== X-CSE-MsgGUID: UYfDiz1FQmSE3Va1noSuhw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,241,1708416000"; d="scan'208";a="26891562" Received: from inlubt0316.iind.intel.com ([10.191.20.213]) by orviesa007.jf.intel.com with ESMTP; 30 Apr 2024 01:53:01 -0700 From: lakshmi.sowjanya.d@intel.com To: tglx@linutronix.de, jstultz@google.com, giometti@enneenne.com, corbet@lwn.net, linux-kernel@vger.kernel.org Cc: x86@kernel.org, netdev@vger.kernel.org, linux-doc@vger.kernel.org, intel-wired-lan@lists.osuosl.org, andriy.shevchenko@linux.intel.com, eddie.dong@intel.com, christopher.s.hall@intel.com, jesse.brandeburg@intel.com, davem@davemloft.net, alexandre.torgue@foss.st.com, joabreu@synopsys.com, mcoquelin.stm32@gmail.com, perex@perex.cz, linux-sound@vger.kernel.org, anthony.l.nguyen@intel.com, peter.hilber@opensynergy.com, pandith.n@intel.com, subramanian.mohan@intel.com, thejesh.reddy.t.r@intel.com, lakshmi.sowjanya.d@intel.com Subject: [PATCH v7 05/12] stmmac: intel: remove convert_art_to_tsc() Date: Tue, 30 Apr 2024 14:22:18 +0530 Message-Id: <20240430085225.18086-6-lakshmi.sowjanya.d@intel.com> X-Mailer: git-send-email 2.35.3 In-Reply-To: <20240430085225.18086-1-lakshmi.sowjanya.d@intel.com> References: <20240430085225.18086-1-lakshmi.sowjanya.d@intel.com> Precedence: bulk X-Mailing-List: linux-sound@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Thomas Gleixner The core code provides a mechanism to convert the ART base clock to the corresponding TSC value without requiring an architecture specific function. All what is required is to store the ART clocksoure ID and the cycles value in the provided system_counterval structure. Replace the direct conversion via convert_art_to_tsc() by filling in the required data. No functional change intended. Signed-off-by: Thomas Gleixner Signed-off-by: Lakshmi Sowjanya D --- drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c index 60283543ffc8..e73fa34237d3 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c @@ -390,10 +390,11 @@ static int intel_crosststamp(ktime_t *device, *device = ns_to_ktime(ptp_time); read_unlock_irqrestore(&priv->ptp_lock, flags); get_arttime(priv->mii, intel_priv->mdio_adhoc_addr, &art_time); - *system = convert_art_to_tsc(art_time); + system->cycles = art_time; } system->cycles *= intel_priv->crossts_adj; + system->cs_id = CSID_X86_ART; priv->plat->flags &= ~STMMAC_FLAG_INT_SNAPSHOT_EN; return 0;