Message ID | 20241014094958.708563-1-amadeuszx.slawinski@linux.intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | ALSA: hda: Fix all stream interrupts definition | expand |
On Mon, 14 Oct 2024 11:49:58 +0200, Amadeusz Sławiński wrote: > > It is defined in header to 0xFF, which only allows to set values for 8 > streams. In specification it is defined as bits from 0 to 29. In > practice there is no HW with 29 streams, but as the only place where the > value is used is chip initialization, it is best to make sure that all > bits are reset properly. > > Reviewed-by: Cezary Rojewski <cezary.rojewski@intel.com> > Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com> Applied to for-next branch. Thanks. Takashi
diff --git a/include/sound/hda_register.h b/include/sound/hda_register.h index 5ff31e6d41c19..db1cc0b897fd3 100644 --- a/include/sound/hda_register.h +++ b/include/sound/hda_register.h @@ -180,7 +180,7 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 }; #define SD_STS_FIFO_READY 0x20 /* FIFO ready */ /* INTCTL and INTSTS */ -#define AZX_INT_ALL_STREAM 0xff /* all stream interrupts */ +#define AZX_INT_ALL_STREAM 0x3fffffff /* all stream interrupts */ #define AZX_INT_CTRL_EN 0x40000000 /* controller interrupt enable bit */ #define AZX_INT_GLOBAL_EN 0x80000000 /* global interrupt enable bit */