From patchwork Wed Oct 28 22:06:40 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caleb Crome X-Patchwork-Id: 7514461 Return-Path: X-Original-To: patchwork-alsa-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 239B09F37F for ; Wed, 28 Oct 2015 22:07:20 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 111E6208AD for ; Wed, 28 Oct 2015 22:07:19 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.kernel.org (Postfix) with ESMTP id 837DE208E3 for ; Wed, 28 Oct 2015 22:07:17 +0000 (UTC) Received: by alsa0.perex.cz (Postfix, from userid 1000) id 92B2F265177; Wed, 28 Oct 2015 23:07:15 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_LOW, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from alsa0.perex.cz (localhost [127.0.0.1]) by alsa0.perex.cz (Postfix) with ESMTP id 88522265011; Wed, 28 Oct 2015 23:07:07 +0100 (CET) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id D53F8265057; Wed, 28 Oct 2015 23:07:05 +0100 (CET) Received: from mail-wm0-f51.google.com (mail-wm0-f51.google.com [74.125.82.51]) by alsa0.perex.cz (Postfix) with ESMTP id AC6BD264FFF for ; Wed, 28 Oct 2015 23:07:00 +0100 (CET) Received: by wmff134 with SMTP id f134so13120692wmf.1 for ; Wed, 28 Oct 2015 15:07:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crome_org.20150623.gappssmtp.com; s=20150623; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc:content-type; bh=PfZdnBBSIFR5SmCC/PfjVz69+KQFPjR/iT2FXTp1mKY=; b=lZsL2m0uFukda2Vvh9NYeNvl4BAexvpK05AbBGiQ2re6oc1kI3s6RYtEqRCSukc+dH QytSps6tJck8HKnCjn9rOlcX9z7/yFsr6fcpNwY7sff6m/55kZA5nOqKa00YPM4Fhs74 FyyJA0odwJ7CrwOY243pPFoCnLRxEkVy/LRjBfwukIDlko65a1etBpdgNl05d+4uc8mA OQKWP0GwBXgUd6GgUaKOv/K/MX+SXY/JUVEOxK6nbu6Mua9vOOsn2/2cMzdTErSnuTCc aFzXFfGYdj8UGR5QGG1//hdKokx93z5HErVnREBRMdUDEooU8cLkErVv9zg6u4hqM3zE OsMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc:content-type; bh=PfZdnBBSIFR5SmCC/PfjVz69+KQFPjR/iT2FXTp1mKY=; b=RA6D9joObo6WYCoq7w2PKIbv00Y3nM3opYalCTVl2TsDUNVeVE80THD0+p1nDH4xMq z9EbOIEmR0Ng2M2fizqrNlj5g5DUCElxRRCTapNKP0tEEWWycoAwo0JScKbVSeVJyP5N we6ZK4K3NiGmMEnTnvZbaQAZpMC+905yZSQymp/52LdHbNYoSw49HA6VFFFIJ22iLXNi 5z5L4ffWk5a2l6T6fNhADsOZAdyEZMx2dxaFPiUVCbYGJ9ybGw1Drsx1s7L4cD3xrZgZ 1Nja2+RY2+hjBTl0nLQIyw0AoLbwQaO1BtzMO0ZnPWu5u1Af6hauTu1AJa+Va3vQK14p qNQw== X-Gm-Message-State: ALoCoQmjw6fH1UE9Sm1Rb4AqkL7BoHMEP9WZuU4PysatsOjnc8Q1wRLpBIXOhQ3PpMACisZ6niYz X-Received: by 10.28.141.204 with SMTP id p195mr2840547wmd.40.1446070020312; Wed, 28 Oct 2015 15:07:00 -0700 (PDT) MIME-Version: 1.0 Received: by 10.27.90.139 with HTTP; Wed, 28 Oct 2015 15:06:40 -0700 (PDT) In-Reply-To: <20151027201101.GA9527@Asurada-CZ80> References: <5625EF02.30602@invoxia.com> <56273F75.2040702@invoxia.com> <20151027071344.GC25728@pengutronix.de> <20151027201101.GA9527@Asurada-CZ80> From: Caleb Crome Date: Wed, 28 Oct 2015 15:06:40 -0700 Message-ID: To: Nicolin Chen , Roberto Fichera Cc: Markus Pargmann , Fabio Estevam , "alsa-devel@alsa-project.org" , "shawn.guo@linaro.org" , "arnaud.mouiche@invoxia.com" Subject: Re: [alsa-devel] fsl_ssi.c: Getting channel slips with fsl_ssi.c in TDM (network) mode. X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP On Tue, Oct 27, 2015 at 1:11 PM, Nicolin Chen wrote: > On Tue, Oct 27, 2015 at 08:13:44AM +0100, Markus Pargmann wrote: > >> > So, the dma priority doesn't seem to be the issue. It's now set in >> > the device tree, and strangely it's set to priority 0 (the highest) >> > along with the UARTS. priority 0 is just the highest in the device >> > tree -- it gets remapped to priority 3 in the sdma driver. the DT >> > exposes only 3 levels of DMA priority, low, medium, and high. I >> > created a new level that maps to DMA priroity 7 (the highest in the >> > hardware), but still got the problem. >> > >> > So, still something unknown causing dma to miss samples. must be in >> > the dma ISR I would assume. I guess it's time to look into that. > >> Cc Nicolin, Fabio, Shawn >> >> Perhaps you have an idea about this? > > Off the top of my head: > > 1) Enable TUE0, TUE1, ROE0, ROE1 to see if there is any IRQ trigged. Ah, I found that SIER TIE & RIE were not enabled. I enabled them (and just submitted a patch to the list, which will need to be fixed). With my 2 patches, the /sys/kernel/debug/2028000.ssi/stats file now shows the proper interrupts. > > 2) Set the watermarks for both TX and RX to 8 while using burst sizes > of 6. It'd be nicer to provisionally set these numbers using hard > code than your current change depending on fifo_depth as it might > be an odd value. Ah, this is fascinating you say this. fifo_depth is definitely odd, it's 15 as set in imx6qdl.dtsi: fsl,fifo-depth = <15>; But the DMA maxburst is made even later in the code... Setting the watermark to 8 and maxburst to 8 dramatically reduces the channel slip rate, in fact, i didn't see a slip for more than 30 minutes of playing. That's a new record for sure. But, eventually, there was an underrun, and the channels slipped. Setting watermark to 8 and maxburst to 6 still had some slips, seemingly more than 8 & 8. I feel like a monkey randomly typing at my keyboard though. I don't know why maxburst=8 worked better. I get the feeling that I was just lucky. There does seem to be a correlation between user space reported underruns and this channel slip, although they definitely are not 1:1 ratio: underruns happen without slips and slips happen without underruns. The latter is very disturbing because user space has no idea something is wrong. My test is simply to run aplay with a 1000 second, 16 channel sound file, and watch the data decoded on my scope. The sound file has the channel number encoded as the most significant nibble of each word, and a do a conditional trigger to watch to make sure the most significant nibble after the fram sync is '0'. i.e. trigger if there is a rising edge on data within 300ns of the rising edge of fsync. Here's the patch that has worked the best so far. > > 3) Try to enlarge the ALSA period size in the asound.conf or passing > parameters when you do the playback/capture so that the number of > interrupts from SDMA may reduce. I checked this earlier and it seemed to help, but didn't solve the issue. I will check it again with my latest updates. -Caleb > > You may also see if the reproducibility is somehow reduced or not. > > Nicolin diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c index 73778c2..b834f77 100644 --- a/sound/soc/fsl/fsl_ssi.c +++ b/sound/soc/fsl/fsl_ssi.c @@ -943,7 +943,7 @@ static int _fsl_ssi_set_dai_fmt(struct device *dev, * size. */ if (ssi_private->use_dma) - wm = ssi_private->fifo_depth - 2; + wm = 8; else wm = ssi_private->fifo_depth; @@ -1260,8 +1260,8 @@ static int fsl_ssi_imx_probe(struct platform_device *pdev, * We have burstsize be "fifo_depth - 2" to match the SSI * watermark setting in fsl_ssi_startup(). */ - ssi_private->dma_params_tx.maxburst = ssi_private->fifo_depth - 2; - ssi_private->dma_params_rx.maxburst = ssi_private->fifo_depth - 2; + ssi_private->dma_params_tx.maxburst = 8; + ssi_private->dma_params_rx.maxburst = 8; ssi_private->dma_params_tx.addr = ssi_private->ssi_phys + CCSR_SSI_STX0; ssi_private->dma_params_rx.addr = ssi_private->ssi_phys + CCSR_SSI_SRX0;