@@ -871,15 +871,26 @@ static int sgtl5000_pcm_hw_params(struct
snd_pcm_substream *substream,
static int sgtl5000_set_bias_level(struct snd_soc_component *component,
enum snd_soc_bias_level level)
{
+ struct sgtl5000_priv *sgtl = snd_soc_component_get_drvdata(component);
+ int ret;
+
switch (level) {
case SND_SOC_BIAS_ON:
case SND_SOC_BIAS_PREPARE:
case SND_SOC_BIAS_STANDBY:
+ regcache_cache_only(sgtl->regmap, false);
+ ret = regcache_sync(sgtl->regmap);
+ if (ret) {
+ regcache_cache_only(sgtl->regmap, true);
+ return ret;
+ }
+
snd_soc_component_update_bits(component,
SGTL5000_CHIP_ANA_POWER,
SGTL5000_REFTOP_POWERUP,
SGTL5000_REFTOP_POWERUP);
break;
case SND_SOC_BIAS_OFF:
+ regcache_cache_only(sgtl->regmap, true);
snd_soc_component_update_bits(component,
Hi Mark, On Thu, Feb 15, 2018 at 4:16 PM, Mark Brown <broonie@kernel.org> wrote: > Does it need a register map resync when powering on again? Thanks for your suggestion! This works: SGTL5000_CHIP_ANA_POWER, SGTL5000_REFTOP_POWERUP, 0); break;