From patchwork Wed Aug 31 13:11:13 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 9307701 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BA698607D2 for ; Wed, 31 Aug 2016 18:51:20 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B01792901E for ; Wed, 31 Aug 2016 18:51:20 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A48EB29024; Wed, 31 Aug 2016 18:51:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=no version=3.3.1 Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D8D0428FFF for ; Wed, 31 Aug 2016 18:51:19 +0000 (UTC) Received: by alsa0.perex.cz (Postfix, from userid 1000) id D1FD8266FE1; Wed, 31 Aug 2016 19:33:48 +0200 (CEST) Received: from alsa0.perex.cz (localhost [127.0.0.1]) by alsa0.perex.cz (Postfix) with ESMTP id A29BA2671C7; Wed, 31 Aug 2016 17:50:24 +0200 (CEST) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id EF0AF2671C5; Wed, 31 Aug 2016 17:50:22 +0200 (CEST) Received: from mail-ua0-f194.google.com (mail-ua0-f194.google.com [209.85.217.194]) by alsa0.perex.cz (Postfix) with ESMTP id 2941E267CFB for ; Wed, 31 Aug 2016 15:11:15 +0200 (CEST) Received: by mail-ua0-f194.google.com with SMTP id 35so3599369uaj.3 for ; Wed, 31 Aug 2016 06:11:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=xfq8KDYqyxbTPJuhiw6TcXQNvmdBj3LuBagZVMRAnZg=; b=FIHWq+5CjrlCcz4Ffm0FS/KdkjiRz/ZpUYer8eEV9IrgLAW7e8A/F4W0p19veqthXC kXxe8NS0MRSE1jAm7KL9RO08aXwqemhBXFn1xg5KtgZaIApjc1hRGz8KSAlKxzf6JSLq HqpW+ARHqgrydv9Uz1IeI/dbh3Ac7M5PCUTyXfeiP5xRwpXYFYbjxnP0riDrT/5EWJEf CBEg93zDmFT+zKz7j0hmZwxNSqEEqjvuSN1DAfAht5MI6C32CFIhHfK21vqfMSIHzfbc 4CwVMxmDddplGNmyVAu690GU66jrYLAPtjRWHnRmhzMSABV9U0KVIt+dlDXtYQGOW2kr RYgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=xfq8KDYqyxbTPJuhiw6TcXQNvmdBj3LuBagZVMRAnZg=; b=SjM8ZBOHqlg1xjkZZQLUXRAZm9QK/PMJxNWVcZYkd1B1SBAph6xrJ7ZzoR1+qMu6/J ypH9QkIKYut4qon3WLUl5gv242hCFknYQAnnYwlXSftiB8SMMTzg2n4FoPiOCzyguIvc AeHsZg2kLYF81UgM9YjYGzh58bDVg0WUGfvk171w8UWQ7TyWW9dUFAGAJl1CC2jzD2us nC2T9+O3Y6PQuUeOk0Lj7VWD/LXv5s25chQSP5JI9DDtW0CRsGTThD/LsUn8Ff5BHCui wqFM2VVIlYESRqC4zRKvCVUDYcJZCo7gSvY+reBC9zQUTNW+vEHKSBq/L/IRXS965AXC l3Fw== X-Gm-Message-State: AE9vXwOLA2tj/3zNFJg9+K05MZuM7GKtETfOMe3qcSrfCAytEKqJLhtyyrFXm0/wtT9Bmd0uPHQ28CGV7uv5Mw== X-Received: by 10.31.1.67 with SMTP id 64mr5467213vkb.105.1472649073952; Wed, 31 Aug 2016 06:11:13 -0700 (PDT) MIME-Version: 1.0 Received: by 10.31.27.216 with HTTP; Wed, 31 Aug 2016 06:11:13 -0700 (PDT) In-Reply-To: <20160831091013.GA3185@begut> References: <20160828160055.GA2122@begut> <20160829192820.GA14207@Asurada-Nvidia> <20160829195428.GD1967@begut> <20160830111414.GA1968@begut> <20160831042100.GA3308@Asurada> <20160831091013.GA3185@begut> From: Fabio Estevam Date: Wed, 31 Aug 2016 10:11:13 -0300 Message-ID: To: Xavi Drudis Ferran Cc: Shengjiu Wang , "alsa-devel@alsa-project.org" , Xiubo Li , Timur Tabi , Nicolin Chen , Fabio Estevam , "linuxppc-dev@lists.ozlabs.org" Subject: Re: [alsa-devel] Setting some clocks back to DUMMY fixes spdif output on imx6q wandboard rev B1 X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP Hi Xavi/Nicolin, On Wed, Aug 31, 2016 at 6:10 AM, Xavi Drudis Ferran wrote: > El Tue, Aug 30, 2016 at 09:21:01PM -0700, Nicolin Chen deia: >> >> No, the problem is not at the rate but the source -- Although the >> MLB clock exists in the clock tree as a better rate provider, it >> might not be correctly enabled or running at the rate it claims. >> > >> >> There are five MLB clocks sharing the same clock gate according >> to CCM chapter in the Reference Manual of imx6q. But five clocks >> come from three different parent clocks, and I am wondering if >> the MLB clock that's connected to the S/PDIF module is really >> derived from this AXI. >> >> Hope Fabio might be able to help on the clock tree issue here:) >> > > I hope too, it's a little over my head, to be euphemistic. > >> >> Another solution for you could be to change the rates of two of >> those existing clocks to the perfect rates for 44.1KHz and 48KHz >> respectively, 22579200Hz and 24576000Hz for example. (If you >> only need one sample rate support, changing rxtx1 SPDIF clock >> only then.) > > Thank you very much. I'm not sure what practical problem that would > solve for me, audio sounds quite right to my ears with the workaround > (disabling MLB). I've looked page 121 of > http://cache.freescale.com/files/32bit/doc/data_sheet/IMX6DQIEC.pdf > And it seems like the the margin for the SPDIF clock would be 16 ns > and I'm like 10 times out of spec. But I can't hear the problem. I > may try it one day to hear how it sounds. > > I'll try to remember it if I ever come across some problem with my audio. > For now what I'd like is to stay as close to linux-libre mainline > as possible, so the quick workaround is enough for me. > > Now for the general case, I'm not sure what the solution should be. > Page 4 of the pdf above says MLB is not present in industrial "parts", > only automotive, or consumer "parts". There are several versions of > IMX6Q in the market. What version must I have ? I guess consumer > (with MLB) but I'm not sure... According to the wandboard-quad-rev-b1 > manual its consumer, MCIMX6Q5EYM10AC, so I should have MLB, I guess. > > $ cat /proc/cpuinfo > processor : 0 > model name : ARMv7 Processor rev 10 (v7l) > BogoMIPS : 7.54 > Features : half thumb fastmult vfp edsp thumbee neon vfpv3 tls vfpd32 > CPU implementer : 0x41 > CPU architecture: 7 > CPU variant : 0x2 > CPU part : 0xc09 > CPU revision : 10 > [...] > > I can't tell what CPU part : 0xc09 means. > > In the reference manual pg 796 I see the same gate seems to affect Media > Local Bus (MLB) clock and Digital Transmission Content Protection > (DTCP). I don't use DTCP but I haven't done anything to disable it. > > http://www.nxp.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf?fasp=1&WT_TYPE=Reference%20Manuals&WT_VENDOR=FREESCALE&WT_FILE_FORMAT=pdf&WT_ASSET=Documentation&fileExt=.pdf Sorry for the delay. As far as I can see, there are two current issues: 1. Regression caused by: 833f2cbf7091099bae ("ARM: dts: imx6: change the core clock of spdif"). Looks like that this commit did much more than just changing the core clock of spdif. It does not mention why MLB clock has been added. Looking at MX6Q RM I do not see the connection between MLB and SPDIF. So I agree with Xavi's suggestion of using the dummy_clk instead of mlb clock. Xavi, Care to send a formal patch with your change? 2. SPDIF clock rate not accurate. Probably using PLL4 as SPDIF source would help to get more accurate SPDIF clock rates. Could you please try the untested change? /* All existing boards with PCIe use LVDS1 */ if (IS_ENABLED(CONFIG_PCI_IMX6)) Regards, Fabio Estevam --- a/drivers/clk/imx/clk-imx6q.c +++ b/drivers/clk/imx/clk-imx6q.c @@ -623,7 +623,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) pr_warn("failed to set up CLKO: %d\n", ret); /* Audio-related clocks configuration */ - clk_set_parent(clk[IMX6QDL_CLK_SPDIF_SEL], clk[IMX6QDL_CLK_PLL3_PFD3_454M]); + clk_set_parent(clk[IMX6QDL_CLK_SPDIF_SEL], clk[IMX6QDL_CLK_PLL4_AUDIO_DIV]);