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[5/5] ASoc: fsl_spdif: Add descriptions for fsl_spdif_priv

Message ID c17222d56dca6ff1bd32bf70dfa7715e82975f84.1398853588.git.Guangyu.Chen@freescale.com (mailing list archive)
State Accepted
Commit b8a832a0b667d48642c495af17b19443208dd09e
Headers show

Commit Message

Nicolin Chen April 30, 2014, 10:54 a.m. UTC
Other people would clearly understand each member and improve if they want.

Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
---
 sound/soc/fsl/fsl_spdif.c | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

Comments

Mark Brown May 5, 2014, 7:28 p.m. UTC | #1
On Wed, Apr 30, 2014 at 06:54:09PM +0800, Nicolin Chen wrote:
> Other people would clearly understand each member and improve if they want.

Applied, thanks.
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Patch

diff --git a/sound/soc/fsl/fsl_spdif.c b/sound/soc/fsl/fsl_spdif.c
index 074b355..b912d45 100644
--- a/sound/soc/fsl/fsl_spdif.c
+++ b/sound/soc/fsl/fsl_spdif.c
@@ -69,6 +69,27 @@  struct spdif_mixer_control {
 	u32 ready_buf;
 };
 
+/**
+ * fsl_spdif_priv: Freescale SPDIF private data
+ *
+ * @fsl_spdif_control: SPDIF control data
+ * @cpu_dai_drv: cpu dai driver
+ * @pdev: platform device pointer
+ * @regmap: regmap handler
+ * @dpll_locked: dpll lock flag
+ * @txrate: the best rates for playback
+ * @txclk_df: STC_TXCLK_DF dividers value for playback
+ * @sysclk_df: STC_SYSCLK_DF dividers value for playback
+ * @txclk_src: STC_TXCLK_SRC values for playback
+ * @rxclk_src: SRPC_CLKSRC_SEL values for capture
+ * @txclk: tx clock sources for playback
+ * @rxclk: rx clock sources for capture
+ * @coreclk: core clock for register access via DMA
+ * @sysclk: system clock for rx clock rate measurement
+ * @dma_params_tx: DMA parameters for transmit channel
+ * @dma_params_rx: DMA parameters for receive channel
+ * @name: driver name
+ */
 struct fsl_spdif_priv {
 	struct spdif_mixer_control fsl_spdif_control;
 	struct snd_soc_dai_driver cpu_dai_drv;