Message ID | s5hsiow88gz.wl%tiwai@suse.de (mailing list archive) |
---|---|
State | Accepted |
Headers | show |
It 'works' as in: the message did not reappear. Thanks a ton! 2014-04-29 17:24 GMT+02:00 Takashi Iwai <tiwai@suse.de>: > At Tue, 29 Apr 2014 17:08:25 +0200, > Ronald wrote: >> >> I take it you want the vendor:device id, but since you have requested >> additional info I have provided some more data. Please let me know if >> I missed anything you require. Thank you. >> >> Below you will find lspci. I have used the alsa-info.sh script for the >> rest (how convenient!): >> >> http://www.alsa-project.org/db/?f=daf13e17122d2db2851591b4d79d3ac34fabf864 >> >> 00:10.1 Audio device [0403]: NVIDIA Corporation MCP51 High Definition >> Audio [10de:026c] (rev a2) >> Subsystem: Hewlett-Packard Company Presario V6133CL [103c:30b7] >> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- >> ParErr- Stepping- SERR- FastB2B- DisINTx- >> Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- >> <TAbort- <MAbort- >SERR- <PERR- INTx- >> Latency: 0 (500ns min, 1250ns max) >> Interrupt: pin B routed to IRQ 21 >> Region 0: Memory at b0000000 (32-bit, non-prefetchable) [size=16K] >> Capabilities: [44] Power Management version 2 >> Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA >> PME(D0-,D1-,D2-,D3hot+,D3cold+) >> Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- >> Capabilities: [50] MSI: Enable- Count=1/1 Maskable+ 64bit+ >> Address: 0000000000000000 Data: 0000 >> Masking: 00000000 Pending: 00000000 >> Capabilities: [6c] HyperTransport: MSI Mapping Enable- Fixed+ >> Kernel driver in use: snd_hda_intel > > Thanks. Could you check whether the patch below works? > > > Takashi > > --- > diff --git a/sound/pci/hda/hda_controller.c b/sound/pci/hda/hda_controller.c > index 248b90abb882..480bbddbd801 100644 > --- a/sound/pci/hda/hda_controller.c > +++ b/sound/pci/hda/hda_controller.c > @@ -1059,24 +1059,26 @@ static void azx_init_cmd_io(struct azx *chip) > > /* reset the corb hw read pointer */ > azx_writew(chip, CORBRP, ICH6_CORBRP_RST); > - for (timeout = 1000; timeout > 0; timeout--) { > - if ((azx_readw(chip, CORBRP) & ICH6_CORBRP_RST) == ICH6_CORBRP_RST) > - break; > - udelay(1); > - } > - if (timeout <= 0) > - dev_err(chip->card->dev, "CORB reset timeout#1, CORBRP = %d\n", > - azx_readw(chip, CORBRP)); > + if (!(chip->driver_caps & AZX_DCAPS_CORBRP_SELF_CLEAR)) { > + for (timeout = 1000; timeout > 0; timeout--) { > + if ((azx_readw(chip, CORBRP) & ICH6_CORBRP_RST) == ICH6_CORBRP_RST) > + break; > + udelay(1); > + } > + if (timeout <= 0) > + dev_err(chip->card->dev, "CORB reset timeout#1, CORBRP = %d\n", > + azx_readw(chip, CORBRP)); > > - azx_writew(chip, CORBRP, 0); > - for (timeout = 1000; timeout > 0; timeout--) { > - if (azx_readw(chip, CORBRP) == 0) > - break; > - udelay(1); > + azx_writew(chip, CORBRP, 0); > + for (timeout = 1000; timeout > 0; timeout--) { > + if (azx_readw(chip, CORBRP) == 0) > + break; > + udelay(1); > + } > + if (timeout <= 0) > + dev_err(chip->card->dev, "CORB reset timeout#2, CORBRP = %d\n", > + azx_readw(chip, CORBRP)); > } > - if (timeout <= 0) > - dev_err(chip->card->dev, "CORB reset timeout#2, CORBRP = %d\n", > - azx_readw(chip, CORBRP)); > > /* enable corb dma */ > azx_writeb(chip, CORBCTL, ICH6_CORBCTL_RUN); > diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c > index d6bca62ef387..b540ad71eb0d 100644 > --- a/sound/pci/hda/hda_intel.c > +++ b/sound/pci/hda/hda_intel.c > @@ -249,7 +249,8 @@ enum { > /* quirks for Nvidia */ > #define AZX_DCAPS_PRESET_NVIDIA \ > (AZX_DCAPS_NVIDIA_SNOOP | AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI |\ > - AZX_DCAPS_ALIGN_BUFSIZE | AZX_DCAPS_NO_64BIT) > + AZX_DCAPS_ALIGN_BUFSIZE | AZX_DCAPS_NO_64BIT |\ > + AZX_DCAPS_CORBRP_SELF_CLEAR) > > #define AZX_DCAPS_PRESET_CTHDA \ > (AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_4K_BDLE_BOUNDARY) > diff --git a/sound/pci/hda/hda_priv.h b/sound/pci/hda/hda_priv.h > index ba38b819f984..4a7cb01fa912 100644 > --- a/sound/pci/hda/hda_priv.h > +++ b/sound/pci/hda/hda_priv.h > @@ -189,6 +189,7 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 }; > #define AZX_DCAPS_COUNT_LPIB_DELAY (1 << 25) /* Take LPIB as delay */ > #define AZX_DCAPS_PM_RUNTIME (1 << 26) /* runtime PM support */ > #define AZX_DCAPS_I915_POWERWELL (1 << 27) /* HSW i915 powerwell support */ > +#define AZX_DCAPS_CORBRP_SELF_CLEAR (1 << 28) /* CORBRP clears itself after reset */ > > /* position fix mode */ > enum {
At Tue, 29 Apr 2014 18:31:44 +0200, Ronald wrote: > > It 'works' as in: the message did not reappear. Thanks a ton! Good to hear. Now I applied the patch. thanks, Takashi > > 2014-04-29 17:24 GMT+02:00 Takashi Iwai <tiwai@suse.de>: > > At Tue, 29 Apr 2014 17:08:25 +0200, > > Ronald wrote: > >> > >> I take it you want the vendor:device id, but since you have requested > >> additional info I have provided some more data. Please let me know if > >> I missed anything you require. Thank you. > >> > >> Below you will find lspci. I have used the alsa-info.sh script for the > >> rest (how convenient!): > >> > >> http://www.alsa-project.org/db/?f=daf13e17122d2db2851591b4d79d3ac34fabf864 > >> > >> 00:10.1 Audio device [0403]: NVIDIA Corporation MCP51 High Definition > >> Audio [10de:026c] (rev a2) > >> Subsystem: Hewlett-Packard Company Presario V6133CL [103c:30b7] > >> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- > >> ParErr- Stepping- SERR- FastB2B- DisINTx- > >> Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- > >> <TAbort- <MAbort- >SERR- <PERR- INTx- > >> Latency: 0 (500ns min, 1250ns max) > >> Interrupt: pin B routed to IRQ 21 > >> Region 0: Memory at b0000000 (32-bit, non-prefetchable) [size=16K] > >> Capabilities: [44] Power Management version 2 > >> Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA > >> PME(D0-,D1-,D2-,D3hot+,D3cold+) > >> Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- > >> Capabilities: [50] MSI: Enable- Count=1/1 Maskable+ 64bit+ > >> Address: 0000000000000000 Data: 0000 > >> Masking: 00000000 Pending: 00000000 > >> Capabilities: [6c] HyperTransport: MSI Mapping Enable- Fixed+ > >> Kernel driver in use: snd_hda_intel > > > > Thanks. Could you check whether the patch below works? > > > > > > Takashi > > > > --- > > diff --git a/sound/pci/hda/hda_controller.c b/sound/pci/hda/hda_controller.c > > index 248b90abb882..480bbddbd801 100644 > > --- a/sound/pci/hda/hda_controller.c > > +++ b/sound/pci/hda/hda_controller.c > > @@ -1059,24 +1059,26 @@ static void azx_init_cmd_io(struct azx *chip) > > > > /* reset the corb hw read pointer */ > > azx_writew(chip, CORBRP, ICH6_CORBRP_RST); > > - for (timeout = 1000; timeout > 0; timeout--) { > > - if ((azx_readw(chip, CORBRP) & ICH6_CORBRP_RST) == ICH6_CORBRP_RST) > > - break; > > - udelay(1); > > - } > > - if (timeout <= 0) > > - dev_err(chip->card->dev, "CORB reset timeout#1, CORBRP = %d\n", > > - azx_readw(chip, CORBRP)); > > + if (!(chip->driver_caps & AZX_DCAPS_CORBRP_SELF_CLEAR)) { > > + for (timeout = 1000; timeout > 0; timeout--) { > > + if ((azx_readw(chip, CORBRP) & ICH6_CORBRP_RST) == ICH6_CORBRP_RST) > > + break; > > + udelay(1); > > + } > > + if (timeout <= 0) > > + dev_err(chip->card->dev, "CORB reset timeout#1, CORBRP = %d\n", > > + azx_readw(chip, CORBRP)); > > > > - azx_writew(chip, CORBRP, 0); > > - for (timeout = 1000; timeout > 0; timeout--) { > > - if (azx_readw(chip, CORBRP) == 0) > > - break; > > - udelay(1); > > + azx_writew(chip, CORBRP, 0); > > + for (timeout = 1000; timeout > 0; timeout--) { > > + if (azx_readw(chip, CORBRP) == 0) > > + break; > > + udelay(1); > > + } > > + if (timeout <= 0) > > + dev_err(chip->card->dev, "CORB reset timeout#2, CORBRP = %d\n", > > + azx_readw(chip, CORBRP)); > > } > > - if (timeout <= 0) > > - dev_err(chip->card->dev, "CORB reset timeout#2, CORBRP = %d\n", > > - azx_readw(chip, CORBRP)); > > > > /* enable corb dma */ > > azx_writeb(chip, CORBCTL, ICH6_CORBCTL_RUN); > > diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c > > index d6bca62ef387..b540ad71eb0d 100644 > > --- a/sound/pci/hda/hda_intel.c > > +++ b/sound/pci/hda/hda_intel.c > > @@ -249,7 +249,8 @@ enum { > > /* quirks for Nvidia */ > > #define AZX_DCAPS_PRESET_NVIDIA \ > > (AZX_DCAPS_NVIDIA_SNOOP | AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI |\ > > - AZX_DCAPS_ALIGN_BUFSIZE | AZX_DCAPS_NO_64BIT) > > + AZX_DCAPS_ALIGN_BUFSIZE | AZX_DCAPS_NO_64BIT |\ > > + AZX_DCAPS_CORBRP_SELF_CLEAR) > > > > #define AZX_DCAPS_PRESET_CTHDA \ > > (AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_4K_BDLE_BOUNDARY) > > diff --git a/sound/pci/hda/hda_priv.h b/sound/pci/hda/hda_priv.h > > index ba38b819f984..4a7cb01fa912 100644 > > --- a/sound/pci/hda/hda_priv.h > > +++ b/sound/pci/hda/hda_priv.h > > @@ -189,6 +189,7 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 }; > > #define AZX_DCAPS_COUNT_LPIB_DELAY (1 << 25) /* Take LPIB as delay */ > > #define AZX_DCAPS_PM_RUNTIME (1 << 26) /* runtime PM support */ > > #define AZX_DCAPS_I915_POWERWELL (1 << 27) /* HSW i915 powerwell support */ > > +#define AZX_DCAPS_CORBRP_SELF_CLEAR (1 << 28) /* CORBRP clears itself after reset */ > > > > /* position fix mode */ > > enum { >
diff --git a/sound/pci/hda/hda_controller.c b/sound/pci/hda/hda_controller.c index 248b90abb882..480bbddbd801 100644 --- a/sound/pci/hda/hda_controller.c +++ b/sound/pci/hda/hda_controller.c @@ -1059,24 +1059,26 @@ static void azx_init_cmd_io(struct azx *chip) /* reset the corb hw read pointer */ azx_writew(chip, CORBRP, ICH6_CORBRP_RST); - for (timeout = 1000; timeout > 0; timeout--) { - if ((azx_readw(chip, CORBRP) & ICH6_CORBRP_RST) == ICH6_CORBRP_RST) - break; - udelay(1); - } - if (timeout <= 0) - dev_err(chip->card->dev, "CORB reset timeout#1, CORBRP = %d\n", - azx_readw(chip, CORBRP)); + if (!(chip->driver_caps & AZX_DCAPS_CORBRP_SELF_CLEAR)) { + for (timeout = 1000; timeout > 0; timeout--) { + if ((azx_readw(chip, CORBRP) & ICH6_CORBRP_RST) == ICH6_CORBRP_RST) + break; + udelay(1); + } + if (timeout <= 0) + dev_err(chip->card->dev, "CORB reset timeout#1, CORBRP = %d\n", + azx_readw(chip, CORBRP)); - azx_writew(chip, CORBRP, 0); - for (timeout = 1000; timeout > 0; timeout--) { - if (azx_readw(chip, CORBRP) == 0) - break; - udelay(1); + azx_writew(chip, CORBRP, 0); + for (timeout = 1000; timeout > 0; timeout--) { + if (azx_readw(chip, CORBRP) == 0) + break; + udelay(1); + } + if (timeout <= 0) + dev_err(chip->card->dev, "CORB reset timeout#2, CORBRP = %d\n", + azx_readw(chip, CORBRP)); } - if (timeout <= 0) - dev_err(chip->card->dev, "CORB reset timeout#2, CORBRP = %d\n", - azx_readw(chip, CORBRP)); /* enable corb dma */ azx_writeb(chip, CORBCTL, ICH6_CORBCTL_RUN); diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index d6bca62ef387..b540ad71eb0d 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -249,7 +249,8 @@ enum { /* quirks for Nvidia */ #define AZX_DCAPS_PRESET_NVIDIA \ (AZX_DCAPS_NVIDIA_SNOOP | AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI |\ - AZX_DCAPS_ALIGN_BUFSIZE | AZX_DCAPS_NO_64BIT) + AZX_DCAPS_ALIGN_BUFSIZE | AZX_DCAPS_NO_64BIT |\ + AZX_DCAPS_CORBRP_SELF_CLEAR) #define AZX_DCAPS_PRESET_CTHDA \ (AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_4K_BDLE_BOUNDARY) diff --git a/sound/pci/hda/hda_priv.h b/sound/pci/hda/hda_priv.h index ba38b819f984..4a7cb01fa912 100644 --- a/sound/pci/hda/hda_priv.h +++ b/sound/pci/hda/hda_priv.h @@ -189,6 +189,7 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 }; #define AZX_DCAPS_COUNT_LPIB_DELAY (1 << 25) /* Take LPIB as delay */ #define AZX_DCAPS_PM_RUNTIME (1 << 26) /* runtime PM support */ #define AZX_DCAPS_I915_POWERWELL (1 << 27) /* HSW i915 powerwell support */ +#define AZX_DCAPS_CORBRP_SELF_CLEAR (1 << 28) /* CORBRP clears itself after reset */ /* position fix mode */ enum {