From patchwork Wed Apr 20 14:59:15 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vasanthakumar Thiagarajan X-Patchwork-Id: 8890961 X-Patchwork-Delegate: kvalo@adurom.com Return-Path: X-Original-To: patchwork-ath10k@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D3377BF29F for ; Wed, 20 Apr 2016 15:00:56 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CB15120263 for ; Wed, 20 Apr 2016 15:00:55 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D0FB1201FE for ; Wed, 20 Apr 2016 15:00:54 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1astcZ-0007YG-HR; Wed, 20 Apr 2016 15:00:51 +0000 Received: from wolverine02.qualcomm.com ([199.106.114.251]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1astcX-0007P7-1h for ath10k@lists.infradead.org; Wed, 20 Apr 2016 15:00:50 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=qti.qualcomm.com; i=@qti.qualcomm.com; q=dns/txt; s=qcdkim; t=1461164448; x=1492700448; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=n4QtF4CHqdbxHbTgM1gdjHhRkxHhoKoyqyu/4YKp4eI=; b=qvjFQrkzI0MuBYnwfEKzK02QD+YLEgoewaMplK1ks1SFtfacrP5/Ai6c Tk8zmFNFFn81DWeWY4k++mTnDeEU1TCbavbCUQeWuLYm6TcACoMEsfGUA RWkh6eDMiaO2GoZjuDfAgCB4xhxRaQtA7q/NpMTHYNQLvM8BHIL1lmDCC k=; X-IronPort-AV: E=Sophos;i="5.24,510,1455004800"; d="scan'208";a="281831315" Received: from ironmsg02-r-new.qualcomm.com (HELO ironmsg02-R.qualcomm.com) ([10.53.140.106]) by wolverine02.qualcomm.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 20 Apr 2016 08:00:33 -0700 X-IronPort-AV: E=McAfee;i="5700,7163,8140"; a="713055582" Received: from nasanexm02a.na.qualcomm.com ([10.85.0.41]) by ironmsg02-R.qualcomm.com with ESMTP/TLS/RC4-SHA; 20 Apr 2016 08:00:30 -0700 Received: from aphydexm01f.ap.qualcomm.com (10.252.127.15) by nasanexm02a.na.qualcomm.com (10.85.0.41) with Microsoft SMTP Server (TLS) id 15.0.1130.7; Wed, 20 Apr 2016 08:00:29 -0700 Received: from qcmail1.qualcomm.com (10.80.80.8) by aphydexm01f.ap.qualcomm.com (10.252.127.15) with Microsoft SMTP Server (TLS) id 15.0.1130.7; Wed, 20 Apr 2016 20:30:21 +0530 Received: by qcmail1.qualcomm.com (sSMTP sendmail emulation); Wed, 20 Apr 2016 20:30:13 +0530 From: Vasanthakumar Thiagarajan To: Subject: [PATCH 3/4] ath10k: Define rx_ppdu_end for QCA9984 Date: Wed, 20 Apr 2016 20:29:15 +0530 Message-ID: <1461164356-9158-4-git-send-email-vthiagar@qti.qualcomm.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1461164356-9158-1-git-send-email-vthiagar@qti.qualcomm.com> References: <1461164356-9158-1-git-send-email-vthiagar@qti.qualcomm.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: NASANEXM01E.na.qualcomm.com (10.85.0.31) To aphydexm01f.ap.qualcomm.com (10.252.127.15) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160420_080049_147372_AACBBFA0 X-CRM114-Status: UNSURE ( 9.24 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -8.0 (--------) X-BeenThere: ath10k@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vasanthakumar Thiagarajan , linux-wireless@vger.kernel.org Sender: "ath10k" Errors-To: ath10k-bounces+patchwork-ath10k=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP QCA9984 Rx descriptor has two 32-bit words of location information when compared to one 32-bit word in QCA99X0. To handle this difference in rx descriptor ppdu_end, define a new ppdu_end for QCA9984 descriptor which has the new structure to represent rx_location_info. Signed-off-by: Vasanthakumar Thiagarajan --- drivers/net/wireless/ath/ath10k/rx_desc.h | 46 +++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/drivers/net/wireless/ath/ath10k/rx_desc.h b/drivers/net/wireless/ath/ath10k/rx_desc.h index 3e7dfaa..9ceebea 100644 --- a/drivers/net/wireless/ath/ath10k/rx_desc.h +++ b/drivers/net/wireless/ath/ath10k/rx_desc.h @@ -996,6 +996,41 @@ struct rx_pkt_end { __le32 phy_timestamp_2; } __packed; +#define RX_LOCATION_INFO0_RTT_FAC_LEGACY_MASK 0x00003fff +#define RX_LOCATION_INFO0_RTT_FAC_LEGACY_LSB 0 +#define RX_LOCATION_INFO0_RTT_FAC_VHT_MASK 0x1fff8000 +#define RX_LOCATION_INFO0_RTT_FAC_VHT_LSB 15 +#define RX_LOCATION_INFO0_RTT_STRONGEST_CHAIN_MASK 0xc0000000 +#define RX_LOCATION_INFO0_RTT_STRONGEST_CHAIN_LSB 30 +#define RX_LOCATION_INFO0_RTT_FAC_LEGACY_STATUS BIT(14) +#define RX_LOCATION_INFO0_RTT_FAC_VHT_STATUS BIT(29) + +#define RX_LOCATION_INFO1_RTT_PREAMBLE_TYPE_MASK 0x0000000c +#define RX_LOCATION_INFO1_RTT_PREAMBLE_TYPE_LSB 2 +#define RX_LOCATION_INFO1_PKT_BW_MASK 0x00000030 +#define RX_LOCATION_INFO1_PKT_BW_LSB 4 +#define RX_LOCATION_INFO1_SKIP_P_SKIP_BTCF_MASK 0x0000ff00 +#define RX_LOCATION_INFO1_SKIP_P_SKIP_BTCF_LSB 8 +#define RX_LOCATION_INFO1_RTT_MSC_RATE_MASK 0x000f0000 +#define RX_LOCATION_INFO1_RTT_MSC_RATE_LSB 16 +#define RX_LOCATION_INFO1_RTT_PBD_LEG_BW_MASK 0x00300000 +#define RX_LOCATION_INFO1_RTT_PBD_LEG_BW_LSB 20 +#define RX_LOCATION_INFO1_TIMING_BACKOFF_MASK 0x07c00000 +#define RX_LOCATION_INFO1_TIMING_BACKOFF_LSB 22 +#define RX_LOCATION_INFO1_RTT_TX_FRAME_PHASE_MASK 0x18000000 +#define RX_LOCATION_INFO1_RTT_TX_FRAME_PHASE_LSB 27 +#define RX_LOCATION_INFO1_RTT_CFR_STATUS BIT(0) +#define RX_LOCATION_INFO1_RTT_CIR_STATUS BIT(1) +#define RX_LOCATION_INFO1_RTT_GI_TYPE BIT(7) +#define RX_LOCATION_INFO1_RTT_MAC_PHY_PHASE BIT(29) +#define RX_LOCATION_INFO1_RTT_TX_DATA_START_X_PHASE BIT(30) +#define RX_LOCATION_INFO1_RX_LOCATION_VALID BIT(31) + +struct rx_location_info { + __le32 rx_location_info0; /* %RX_LOCATION_INFO0_ */ + __le32 rx_location_info1; /* %RX_LOCATION_INFO1_ */ +} __packed; + enum rx_phy_ppdu_end_info0 { RX_PHY_PPDU_END_INFO0_ERR_RADAR = BIT(2), RX_PHY_PPDU_END_INFO0_ERR_RX_ABORT = BIT(3), @@ -1074,12 +1109,23 @@ struct rx_ppdu_end_qca99x0 { __le16 info1; /* %RX_PPDU_END_INFO1_ */ } __packed; +struct rx_ppdu_end_qca9984 { + struct rx_pkt_end rx_pkt_end; + struct rx_location_info rx_location_info; + struct rx_phy_ppdu_end rx_phy_ppdu_end; + __le32 rx_timing_offset; /* %RX_PPDU_END_RX_TIMING_OFFSET_ */ + __le32 rx_info; /* %RX_PPDU_END_RX_INFO_ */ + __le16 bb_length; + __le16 info1; /* %RX_PPDU_END_INFO1_ */ +} __packed; + struct rx_ppdu_end { struct rx_ppdu_end_common common; union { struct rx_ppdu_end_qca988x qca988x; struct rx_ppdu_end_qca6174 qca6174; struct rx_ppdu_end_qca99x0 qca99x0; + struct rx_ppdu_end_qca9984 qca9984; } __packed; } __packed;