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[81.233.89.221]) by smtp.gmail.com with ESMTPSA id q64sm6807848ljq.76.2019.04.09.12.13.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 09 Apr 2019 12:13:07 -0700 (PDT) From: Erik Stromdahl To: kvalo@qca.qualcomm.com, linux-wireless@vger.kernel.org, ath10k@lists.infradead.org Subject: [PATCH 1/6] ath10k: use clean packet headers Date: Tue, 9 Apr 2019 21:08:46 +0200 Message-Id: <20190409190851.4557-2-erik.stromdahl@gmail.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190409190851.4557-1-erik.stromdahl@gmail.com> References: <20190409190851.4557-1-erik.stromdahl@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190409_121310_084070_3B007F36 X-CRM114-Status: GOOD ( 10.36 ) X-BeenThere: ath10k@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alagu Sankar Sender: "ath10k" Errors-To: ath10k-bounces+patchwork-ath10k=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Alagu Sankar HTC header carries junk values that may be interpreted by the firmware differently. Enable credit update only if flow control is enabled for the corresponding endpoint. PLL clock setting sequence does not mask the PLL_CONTROL register value. Side effect of not masking the values is not known as the entire pll clock setting sequence is undocumented. Signed-off-by: Alagu Sankar --- drivers/net/wireless/ath/ath10k/htc.c | 1 + drivers/net/wireless/ath/ath10k/hw.c | 2 ++ 2 files changed, 3 insertions(+) diff --git a/drivers/net/wireless/ath/ath10k/htc.c b/drivers/net/wireless/ath/ath10k/htc.c index 805a7f8a04f2..1d4d1a1992fe 100644 --- a/drivers/net/wireless/ath/ath10k/htc.c +++ b/drivers/net/wireless/ath/ath10k/htc.c @@ -73,6 +73,7 @@ static void ath10k_htc_prepare_tx_skb(struct ath10k_htc_ep *ep, struct ath10k_htc_hdr *hdr; hdr = (struct ath10k_htc_hdr *)skb->data; + memset(hdr, 0, sizeof(struct ath10k_htc_hdr)); hdr->eid = ep->eid; hdr->len = __cpu_to_le16(skb->len - sizeof(*hdr)); diff --git a/drivers/net/wireless/ath/ath10k/hw.c b/drivers/net/wireless/ath/ath10k/hw.c index ad082b7d7643..cfc232f1fdbc 100644 --- a/drivers/net/wireless/ath/ath10k/hw.c +++ b/drivers/net/wireless/ath/ath10k/hw.c @@ -814,6 +814,8 @@ static int ath10k_hw_qca6174_enable_pll_clock(struct ath10k *ar) if (ret) return -EINVAL; + reg_val &= ~(WLAN_PLL_CONTROL_REFDIV_MASK | WLAN_PLL_CONTROL_DIV_MASK | + WLAN_PLL_CONTROL_NOPWD_MASK); reg_val |= (SM(hw_clk->refdiv, WLAN_PLL_CONTROL_REFDIV) | SM(hw_clk->div, WLAN_PLL_CONTROL_DIV) | SM(1, WLAN_PLL_CONTROL_NOPWD));