From patchwork Tue Jan 2 21:07:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Hasemeyer X-Patchwork-Id: 13509375 Received: from mail-io1-f42.google.com (mail-io1-f42.google.com [209.85.166.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8D1FC16427 for ; Tue, 2 Jan 2024 21:08:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="i65N+lNY" Received: by mail-io1-f42.google.com with SMTP id ca18e2360f4ac-7bbbe7b1b36so41534439f.1 for ; Tue, 02 Jan 2024 13:08:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1704229723; x=1704834523; darn=lists.linux.dev; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=C7mFJdJJR38MVoewAU3PshqnCmTUbmo4+vjrut4nXkA=; b=i65N+lNYMTm7eel+oZkfRY3+mC/HzKVTTD3thPPIUtbeaQ76K+hl2Jh5kJgFx6ENgX 0bTbxnPXYQkYgv6oCzIzWf7TetQ1yGTMO1aawY19YD08SzcQx7IV7yURrDqPlSKD7fkw 0JlM1ad5C30tsOTaGBpp0PwY4crcyii0dGt5k= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704229723; x=1704834523; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=C7mFJdJJR38MVoewAU3PshqnCmTUbmo4+vjrut4nXkA=; b=hsUn+AQs5I85nA3dTC0ybRZuBFZPv+7TfKN3IxGtHvjswhnw6MflrN+f43i+E8/am3 4ie/dFCA34P6xgqSqVh8Wysz49cKVhVvQDRrD/ZpJu1UdcXmGEupU5RjOyDz3LF4VPUX 9i1foWCyf9sPJ4YXs2HpPhkwahGYHgl5Ac/Q980sFXvnnsjQiTTJHqmVbt05YmBrqHap 9O4V9oVCqtX3IeJ6BZFwPMBAWNWBsoH2AfJLAEf05VHhK+sp1TS3hI1iOSOwJCX85VxX kvquo2vpMh5B6fNVY5K5eGV+MfVlZdl5OyA44u5FvgG9XWsmpy+fwhm3ip5k1mtpZ5EJ 0e0A== X-Gm-Message-State: AOJu0YwFKE9D4OyD+dz30nBM0ygUScEGsFb66syLABnwrarGFszKBBkd 6UIjbiIOb/hYwcfha2kXXuzFg005RuD2 X-Google-Smtp-Source: AGHT+IH30ze8lliPJsLy0+gFPaeKunMXu0LXjX1HO6/sLENHoZmveXOqCkZRgWXN24Z3/Wl9tJipHw== X-Received: by 2002:a05:6602:e03:b0:7ba:a232:30fe with SMTP id gp3-20020a0566020e0300b007baa23230femr13087461iob.20.1704229723563; Tue, 02 Jan 2024 13:08:43 -0800 (PST) Received: from markhas1.lan (71-218-50-136.hlrn.qwest.net. [71.218.50.136]) by smtp.gmail.com with ESMTPSA id bo18-20020a056638439200b0046993034c91sm6956978jab.77.2024.01.02.13.08.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Jan 2024 13:08:43 -0800 (PST) From: Mark Hasemeyer To: LKML Cc: Sudeep Holla , AngeloGioacchino Del Regno , Rob Herring , Andy Shevchenko , Krzysztof Kozlowski , Konrad Dybcio , Raul Rangel , Tzung-Bi Shih , Mark Hasemeyer , AKASHI Takahiro , Alexandre TORGUE , Alim Akhtar , Andre Przywara , Andrew Morton , Andy Shevchenko , Baoquan He , Bartosz Golaszewski , Benson Leung , Bhanu Prakash Maiya , Bjorn Andersson , Chen-Yu Tsai , Conor Dooley , Daniel Scally , David Gow , Frank Rowand , Greg Kroah-Hartman , Guenter Roeck , Heikki Krogerus , Heiko Stuebner , Jonathan Hunter , Krzysztof Kozlowski , Len Brown , Linus Walleij , Mark Brown , Matthias Brugger , Mika Westerberg , Nick Hawkins , Paul Barker , Prashant Malani , "Rafael J. Wysocki" , Rob Barnes , Rob Herring , Romain Perier , Sakari Ailus , Stephen Boyd , Takashi Iwai , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Wei Xu , Wolfram Sang , chrome-platform@lists.linux.dev, cros-qcom-dts-watchers@chromium.org, devicetree@vger.kernel.org, linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v4 00/24] Improve IRQ wake capability reporting and update the cros_ec driver to use it Date: Tue, 2 Jan 2024 14:07:24 -0700 Message-ID: <20240102210820.2604667-1-markhas@chromium.org> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog Precedence: bulk X-Mailing-List: chrome-platform@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Currently the cros_ec driver assumes that its associated interrupt is wake capable. This is an incorrect assumption as some Chromebooks use a separate wake pin, while others overload the interrupt for wake and IO. This patch train updates the driver to query the underlying ACPI/DT data to determine whether or not the IRQ should be enabled for wake. Both the device tree and ACPI systems have methods for reporting IRQ wake capability. In device tree based systems, a node can advertise itself as a 'wakeup-source'. In ACPI based systems, GpioInt and Interrupt resource descriptors can use the 'SharedAndWake' or 'ExclusiveAndWake' share types. Some logic is added to the platform, ACPI, and DT subsystems to more easily pipe wakeirq information up to the driver. Changes in v4: -Rebase on linux-next -See each patch for patch specific changes Changes in v3: -Rebase on linux-next -See each patch for patch specific changes Changes in v2: -Rebase on linux-next -Add cover letter -See each patch for patch specific changes Mark Hasemeyer (24): resource: Add DEFINE_RES_*_NAMED_FLAGS macro gpiolib: acpi: Modify acpi_dev_irq_wake_get_by() to use resource i2c: acpi: Modify i2c_acpi_get_irq() to use resource dt-bindings: power: Clarify wording for wakeup-source property ARM: dts: tegra: Enable cros-ec-spi as wake source ARM: dts: rockchip: rk3288: Enable cros-ec-spi as wake source ARM: dts: samsung: exynos5420: Enable cros-ec-spi as wake source ARM: dts: samsung: exynos5800: Enable cros-ec-spi as wake source arm64: dts: mediatek: mt8173: Enable cros-ec-spi as wake source arm64: dts: mediatek: mt8183: Enable cros-ec-spi as wake source arm64: dts: mediatek: mt8192: Enable cros-ec-spi as wake source arm64: dts: mediatek: mt8195: Enable cros-ec-spi as wake source arm64: dts: tegra: Enable cros-ec-spi as wake source arm64: dts: qcom: sc7180: Enable cros-ec-spi as wake source arm64: dts: qcom: sc7280: Enable cros-ec-spi as wake source arm64: dts: qcom: sdm845: Enable cros-ec-spi as wake source arm64: dts: rockchip: rk3399: Enable cros-ec-spi as wake source of: irq: add wake capable bit to of_irq_resource() of: irq: Add default implementation for of_irq_to_resource() of: irq: Remove extern from function declarations device property: Modify fwnode irq_get() to use resource device property: Update functions to use EXPORT_SYMBOL_GPL() platform: Modify platform_get_irq_optional() to use resource platform/chrome: cros_ec: Use PM subsystem to manage wakeirq .../bindings/power/wakeup-source.txt | 18 ++-- arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi | 1 + arch/arm/boot/dts/nvidia/tegra124-venice2.dts | 1 + .../rockchip/rk3288-veyron-chromebook.dtsi | 1 + .../boot/dts/samsung/exynos5420-peach-pit.dts | 1 + .../boot/dts/samsung/exynos5800-peach-pi.dts | 1 + arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi | 1 + .../arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 1 + .../boot/dts/mediatek/mt8192-asurada.dtsi | 1 + .../boot/dts/mediatek/mt8195-cherry.dtsi | 1 + .../arm64/boot/dts/nvidia/tegra132-norrin.dts | 1 + arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 1 + .../arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 1 + .../arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi | 1 + arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi | 1 + arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 1 + drivers/acpi/property.c | 11 ++- drivers/base/platform.c | 90 ++++++++++++------- drivers/base/property.c | 40 ++++++--- drivers/gpio/gpiolib-acpi.c | 28 ++++-- drivers/i2c/i2c-core-acpi.c | 43 ++++----- drivers/i2c/i2c-core-base.c | 6 +- drivers/i2c/i2c-core.h | 4 +- drivers/of/irq.c | 39 +++++++- drivers/of/property.c | 8 +- drivers/platform/chrome/cros_ec.c | 48 ++++++++-- drivers/platform/chrome/cros_ec_lpc.c | 40 +++++++-- drivers/platform/chrome/cros_ec_spi.c | 15 ++-- drivers/platform/chrome/cros_ec_uart.c | 14 ++- include/linux/acpi.h | 25 +++--- include/linux/fwnode.h | 8 +- include/linux/ioport.h | 20 +++-- include/linux/of_irq.h | 41 +++++---- include/linux/platform_data/cros_ec_proto.h | 4 +- include/linux/platform_device.h | 3 + include/linux/property.h | 2 + 36 files changed, 350 insertions(+), 172 deletions(-)