Show patches with: Series = Versa3 clk driver improvements       |   6 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[6.1.y-cip,6/6] clk: versaclock3: Drop ret variable Versa3 clk driver improvements - - - --- 2024-02-02 Biju Das Accepted
[6.1.y-cip,5/6] clk: versaclock3: Add missing space between ')' and '{' Versa3 clk driver improvements - - - --- 2024-02-02 Biju Das Accepted
[6.1.y-cip,4/6] clk: versaclock3: Use u8 return type for get_parent() callback Versa3 clk driver improvements - - - --- 2024-02-02 Biju Das Accepted
[6.1.y-cip,3/6] clk: versaclock3: Avoid unnecessary padding Versa3 clk driver improvements - - - --- 2024-02-02 Biju Das Accepted
[6.1.y-cip,2/6] clk: versaclock3: Update vc3_get_div() to avoid divide by zero Versa3 clk driver improvements - - - --- 2024-02-02 Biju Das Accepted
[6.1.y-cip,1/6] arm64: defconfig: Enable Renesas VersaClock 3 clock generator config Versa3 clk driver improvements - 1 - --- 2024-02-02 Biju Das Accepted