From patchwork Mon May 13 15:36:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrizio Castro X-Patchwork-Id: 10941227 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8EDF3933 for ; Mon, 13 May 2019 15:37:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 80801283A6 for ; Mon, 13 May 2019 15:37:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 74C3C283AF; Mon, 13 May 2019 15:37:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from mail.linuxfoundation.org (mail.linuxfoundation.org [140.211.169.12]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A3736283A8 for ; Mon, 13 May 2019 15:37:26 +0000 (UTC) Received: from mail.linux-foundation.org (localhost [127.0.0.1]) by mail.linuxfoundation.org (Postfix) with ESMTP id 716C3E60; Mon, 13 May 2019 15:37:26 +0000 (UTC) X-Original-To: cip-dev@lists.cip-project.org Delivered-To: cip-dev@mail.linuxfoundation.org Received: from smtp1.linuxfoundation.org (smtp1.linux-foundation.org [172.17.192.35]) by mail.linuxfoundation.org (Postfix) with ESMTPS id 21BE8D85 for ; Mon, 13 May 2019 15:37:25 +0000 (UTC) X-Greylist: domain auto-whitelisted by SQLgrey-1.7.6 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp1.linuxfoundation.org (Postfix) with ESMTP id 85CA727B for ; Mon, 13 May 2019 15:37:24 +0000 (UTC) X-IronPort-AV: E=Sophos;i="5.60,465,1549897200"; d="scan'208";a="15608146" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 14 May 2019 00:37:23 +0900 Received: from fabrizio-dev.ree.adwin.renesas.com (unknown [10.226.36.196]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 3EAD6401BA41; Tue, 14 May 2019 00:37:22 +0900 (JST) From: Fabrizio Castro To: cip-dev@lists.cip-project.org Date: Mon, 13 May 2019 16:36:27 +0100 Message-Id: <1557761837-24993-3-git-send-email-fabrizio.castro@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1557761837-24993-1-git-send-email-fabrizio.castro@bp.renesas.com> References: <1557761837-24993-1-git-send-email-fabrizio.castro@bp.renesas.com> Cc: Biju Das Subject: [cip-dev] [PATCH 4.4.y 02/52] clk: shmobile: rcar-gen2: Add quirks for the RZ/G1C X-BeenThere: cip-dev@lists.cip-project.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: cip-dev-bounces@lists.cip-project.org Errors-To: cip-dev-bounces@lists.cip-project.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds a quirk for clocks "sd0" and "sd1" for the RZ/G1C (a.k.a. r8a77470) SoC, similarly to what has been done upstream with commit: 5bf2fbbef50c ("clk: renesas: cpg-mssr: Add r8a77470 support") and also customizes the settings for the PLLs. Signed-off-by: Fabrizio Castro --- drivers/clk/shmobile/clk-rcar-gen2.c | 39 +++++++++++++++++++++++++++++++++++- 1 file changed, 38 insertions(+), 1 deletion(-) diff --git a/drivers/clk/shmobile/clk-rcar-gen2.c b/drivers/clk/shmobile/clk-rcar-gen2.c index 6ab0199..3f7d331 100644 --- a/drivers/clk/shmobile/clk-rcar-gen2.c +++ b/drivers/clk/shmobile/clk-rcar-gen2.c @@ -268,6 +268,24 @@ static struct clk * __init cpg_adsp_clk_register(struct rcar_gen2_cpg *cpg) #define CPG_PLL_CONFIG_INDEX(md) ((((md) & BIT(14)) >> 12) | \ (((md) & BIT(13)) >> 12) | \ (((md) & BIT(19)) >> 19)) + +/* + * This table is only valid for the RZ/G1C + * + * MD EXTAL PLL0 PLL1 PLL3 + * 14 13 (MHz) *1 *2 + *--------------------------------------------------- + * 0 0 20 / 1 x80 x78 x50 + * 0 1 26 / 1 x60 x60 x56 + * 1 0 Prohibited setting + * 1 1 30 / 1 x52 x52 x50 + * + * *1 : Table 7.4 indicates VCO output (PLL0 = VCO) + * *2 : Table 7.4 indicates VCO output (PLL1 = VCO) + */ +#define CPG_PLL_CONFIG_INDEX_RZG1C(md) ((((md) & BIT(14)) >> 13) | \ + (((md) & BIT(13)) >> 13)) + struct cpg_pll_config { unsigned int extal_div; unsigned int pll1_mult; @@ -282,6 +300,14 @@ static const struct cpg_pll_config cpg_pll_configs[8] __initconst = { { 2, 208, 106, 200 }, { 2, 208, 88, 200 }, }; +static const struct cpg_pll_config cpg_pll_configs_rzg1c[4] __initconst = { + /* EXTAL div PLL1 mult x2 PLL3 mult */ + { 1, 156, 50, }, + { 1, 120, 56, }, + { /* Invalid*/ }, + { 1, 104, 50, }, +}; + /* SDHI divisors */ static const struct clk_div_table cpg_sdh_div_table[] = { { 0, 2 }, { 1, 3 }, { 2, 4 }, { 3, 6 }, @@ -308,6 +334,8 @@ static const char * const pll0_mult_match[] = { NULL }; +static const char *r8a77470_compat = "renesas,r8a77470-cpg-clocks"; + static struct clk * __init rcar_gen2_cpg_register_clock(struct device_node *np, struct rcar_gen2_cpg *cpg, const struct cpg_pll_config *config, @@ -357,10 +385,16 @@ rcar_gen2_cpg_register_clock(struct device_node *np, struct rcar_gen2_cpg *cpg, } else if (!strcmp(name, "sd0")) { parent_name = "pll1"; table = cpg_sd01_div_table; + if (of_device_is_compatible(np, r8a77470_compat)) + table++; + shift = 4; } else if (!strcmp(name, "sd1")) { parent_name = "pll1"; table = cpg_sd01_div_table; + if (of_device_is_compatible(np, r8a77470_compat)) + table++; + shift = 0; } else if (!strcmp(name, "z")) { return cpg_z_clk_register(cpg); @@ -414,7 +448,10 @@ static void __init rcar_gen2_cpg_clocks_init(struct device_node *np) if (WARN_ON(cpg->reg == NULL)) return; - config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; + if (of_device_is_compatible(np, r8a77470_compat)) + config = &cpg_pll_configs_rzg1c[CPG_PLL_CONFIG_INDEX_RZG1C(cpg_mode)]; + else + config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; for (i = 0; i < num_clks; ++i) { const char *name;