From patchwork Thu Nov 7 08:31:50 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 11232139 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0A99916B1 for ; Thu, 7 Nov 2019 08:35:51 +0000 (UTC) Received: from mail.linuxfoundation.org (mail.linuxfoundation.org [140.211.169.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E6B8221D79 for ; Thu, 7 Nov 2019 08:35:50 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E6B8221D79 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bp.renesas.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=cip-dev-bounces@lists.cip-project.org Received: from mail.linux-foundation.org (localhost [127.0.0.1]) by mail.linuxfoundation.org (Postfix) with ESMTP id 44791CC7; Thu, 7 Nov 2019 08:34:46 +0000 (UTC) X-Original-To: cip-dev@lists.cip-project.org Delivered-To: cip-dev@mail.linuxfoundation.org Received: from smtp2.linuxfoundation.org (smtp2.linux-foundation.org [172.17.192.36]) by mail.linuxfoundation.org (Postfix) with ESMTPS id 67391CBF for ; Thu, 7 Nov 2019 08:34:44 +0000 (UTC) X-Greylist: domain auto-whitelisted by SQLgrey-1.7.6 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp2.linuxfoundation.org (Postfix) with ESMTP id 316B21DAA7 for ; Thu, 7 Nov 2019 08:34:43 +0000 (UTC) X-IronPort-AV: E=Sophos;i="5.68,277,1569250800"; d="scan'208";a="31074129" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 07 Nov 2019 17:34:42 +0900 Received: from be1yocto.ree.adwin.renesas.com (unknown [172.29.43.62]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 7C72241E8736; Thu, 7 Nov 2019 17:34:41 +0900 (JST) From: Biju Das To: cip-dev@lists.cip-project.org, Nobuhiro Iwamatsu , Pavel Machek Date: Thu, 7 Nov 2019 08:31:50 +0000 Message-Id: <1573115572-13513-22-git-send-email-biju.das@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1573115572-13513-1-git-send-email-biju.das@bp.renesas.com> References: <1573115572-13513-1-git-send-email-biju.das@bp.renesas.com> X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on smtp2.linux-foundation.org Cc: Biju Das Subject: [cip-dev] [PATCH 4.4.y-cip 21/83] mmc: tmio: give read32/write32 functions more descriptive names X-BeenThere: cip-dev@lists.cip-project.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: cip-dev-bounces@lists.cip-project.org Errors-To: cip-dev-bounces@lists.cip-project.org From: Wolfram Sang commit 2c54506b769d0633aac8f0511ef23f76bedeec9e upstream. Looking at the backlogs, I am not the only one who missed that the above functions do not read u32 from one register, but create a virtual u32 from reading to adjacent u16 registers (which depending on 'bus_shift' can be up to 8 byte apart). Because this driver supports old hardware for which we don't have documentation, I first wrongly assumed there was a variant which had a few u32 registers. Let's give the functions more descriptive names to make it more obvious what is happening. Reviewed-by: Simon Horman Signed-off-by: Wolfram Sang Signed-off-by: Ulf Hansson Signed-off-by: Biju Das --- drivers/mmc/host/tmio_mmc.h | 5 ++--- drivers/mmc/host/tmio_mmc_pio.c | 22 +++++++++++----------- 2 files changed, 13 insertions(+), 14 deletions(-) diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h index 439fdad..e75e5ca 100644 --- a/drivers/mmc/host/tmio_mmc.h +++ b/drivers/mmc/host/tmio_mmc.h @@ -232,7 +232,7 @@ static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr, readsw(host->ctl + (addr << host->bus_shift), buf, count); } -static inline u32 sd_ctrl_read32(struct tmio_mmc_host *host, int addr) +static inline u32 sd_ctrl_read16_and_16_as_32(struct tmio_mmc_host *host, int addr) { return readw(host->ctl + (addr << host->bus_shift)) | readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16; @@ -254,11 +254,10 @@ static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr, writesw(host->ctl + (addr << host->bus_shift), buf, count); } -static inline void sd_ctrl_write32(struct tmio_mmc_host *host, int addr, u32 val) +static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host, int addr, u32 val) { writew(val, host->ctl + (addr << host->bus_shift)); writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift)); } - #endif diff --git a/drivers/mmc/host/tmio_mmc_pio.c b/drivers/mmc/host/tmio_mmc_pio.c index 78fd343..fcc6879 100644 --- a/drivers/mmc/host/tmio_mmc_pio.c +++ b/drivers/mmc/host/tmio_mmc_pio.c @@ -55,18 +55,18 @@ void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i) { host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ); - sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask); + sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask); } void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i) { host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ); - sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask); + sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask); } static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i) { - sd_ctrl_write32(host, CTL_STATUS, ~i); + sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i); } static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data) @@ -375,7 +375,7 @@ static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command tmio_mmc_enable_mmc_irqs(host, irq_mask); /* Fire off the command */ - sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg); + sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg); sd_ctrl_write16(host, CTL_SD_CMD, c); return 0; @@ -530,7 +530,7 @@ static void tmio_mmc_data_irq(struct tmio_mmc_host *host) goto out; if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) { - u32 status = sd_ctrl_read32(host, CTL_STATUS); + u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS); bool done = false; /* @@ -585,7 +585,7 @@ static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, */ for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4) - cmd->resp[i] = sd_ctrl_read32(host, addr); + cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr); if (cmd->flags & MMC_RSP_136) { cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24); @@ -704,14 +704,14 @@ irqreturn_t tmio_mmc_irq(int irq, void *devid) struct tmio_mmc_host *host = devid; unsigned int ireg, status; - status = sd_ctrl_read32(host, CTL_STATUS); + status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS); ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask; pr_debug_status(status); pr_debug_status(ireg); /* Clear the status except the interrupt status */ - sd_ctrl_write32(host, CTL_STATUS, TMIO_MASK_IRQ); + sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ); if (__tmio_mmc_card_detect_irq(host, ireg, status)) return IRQ_HANDLED; @@ -947,7 +947,7 @@ static int tmio_mmc_get_ro(struct mmc_host *mmc) return ret; ret = !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) || - (sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT)); + (sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT)); return ret; } @@ -967,7 +967,7 @@ static int tmio_mmc_card_busy(struct mmc_host *mmc) { struct tmio_mmc_host *host = mmc_priv(mmc); - return !(sd_ctrl_read32(host, CTL_STATUS2) & TMIO_STATUS2_DAT0); + return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS2) & TMIO_STATUS2_DAT0); } static struct mmc_host_ops tmio_mmc_ops = { @@ -1116,7 +1116,7 @@ int tmio_mmc_host_probe(struct tmio_mmc_host *_host, tmio_mmc_clk_stop(_host); tmio_mmc_reset(_host); - _host->sdcard_irq_mask = sd_ctrl_read32(_host, CTL_IRQ_MASK); + _host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK); tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL); /* Unmask the IRQs we want to know about */