From patchwork Mon Feb 10 06:55:38 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kazuhiro Hayashi X-Patchwork-Id: 13967354 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id AEDEDC3DA4A for ; Mon, 10 Feb 2025 06:56:45 +0000 (UTC) Received: from mo-csw.securemx.jp (mo-csw.securemx.jp [210.130.202.158]) by mx.groups.io with SMTP id smtpd.web11.45208.1739170603107004982 for ; Sun, 09 Feb 2025 22:56:43 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=kazuhiro3.hayashi@toshiba.co.jp header.s=key2.smx header.b=DYQuxs3E; spf=pass (domain: toshiba.co.jp, ip: 210.130.202.158, mailfrom: kazuhiro3.hayashi@toshiba.co.jp) DKIM-Signature: v=1;a=rsa-sha256;c=relaxed/simple;d=toshiba.co.jp;h=From:To:Cc :Subject:Date:Message-Id:In-Reply-To:References;i= kazuhiro3.hayashi@toshiba.co.jp;s=key2.smx;t=1739170574;x=1740380174;bh=5MfGl 6e6Blv62gnNYU5ipLCi4CnP2QBHtpDPl+oXTF0=;b=DYQuxs3EEqvXXJ/ztGbr1tuSO9A80FHA+BY lDh9ciSj1K38wUG97jMcXu+ZqH5/jZbF5bXYq3xG+wyXKvtYzZ7gUzhaNzAFgz/HlKfIqEzNqizm6 6Dd2IPfLizDJxlsI5NGOMCVDrRM4O9LDiZSVuUkzUFrSiVrougRR2KcGMseqy3HvnzuX34Vg9zK/A 5xrDQkScj5/tPKW0ryMapv+PxM6HBclO7ZNS7WjD05HnxEZtuWpvG4F8p25gJd9zz2+IRZhfILpAk m2a4UWjc5PLpuxULKn8SnW4PXnK1r7Ynd5W7UYvqr0C7elEu2A6i46wIkkGSx9RJmua8VV3sDIYg= =; Received: by mo-csw.securemx.jp (mx-mo-csw1122) id 51A6uEr3605391; Mon, 10 Feb 2025 15:56:14 +0900 X-Iguazu-Qid: 2rWhg4sy0fhlZpldaO X-Iguazu-QSIG: v=2; s=0; t=1739170569; q=2rWhg4sy0fhlZpldaO; m=za6T2eJrO3RRQIGN4B5VThZHvkjZ0EevlFFIbYCfizE= Received: from imx2-a.toshiba.co.jp (imx2-a.toshiba.co.jp [106.186.93.35]) by relay.securemx.jp (mx-mr1122) id 51A6u7Gw182853 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NOT); Mon, 10 Feb 2025 15:56:08 +0900 From: Kazuhiro Hayashi To: linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, cip-dev@lists.cip-project.org Cc: bigeasy@linutronix.de, tglx@linutronix.de, rostedt@goodmis.org, linux-rt-users@vger.kernel.org, pavel@denx.de Subject: [PATCH 4.4 v1 10/17] iommu/vt-d: Adjust system_state checks Date: Mon, 10 Feb 2025 15:55:38 +0900 X-TSB-HOP2: ON Message-Id: <1739170545-25011-11-git-send-email-kazuhiro3.hayashi@toshiba.co.jp> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1739170545-25011-1-git-send-email-kazuhiro3.hayashi@toshiba.co.jp> References: <1739170545-25011-1-git-send-email-kazuhiro3.hayashi@toshiba.co.jp> List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Mon, 10 Feb 2025 06:56:45 -0000 X-Groupsio-URL: https://lists.cip-project.org/g/cip-dev/message/17795 From: Thomas Gleixner commit b608fe356fe8328665445a26ec75dfac918c8c5d upstream. To enable smp_processor_id() and might_sleep() debug checks earlier, it's required to add system states between SYSTEM_BOOTING and SYSTEM_RUNNING. Adjust the system_state checks in dmar_parse_one_atsr() and dmar_iommu_notify_scope_dev() to handle the extra states. Signed-off-by: Thomas Gleixner Signed-off-by: Peter Zijlstra (Intel) Acked-by: Joerg Roedel Cc: David Woodhouse Cc: Greg Kroah-Hartman Cc: Linus Torvalds Cc: Mark Rutland Cc: Peter Zijlstra Cc: Steven Rostedt Cc: iommu@lists.linux-foundation.org Link: http://lkml.kernel.org/r/20170516184735.712365947@linutronix.de Signed-off-by: Ingo Molnar Signed-off-by: Kazuhiro Hayashi --- drivers/iommu/intel-iommu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index ed6cb3abf645..a8a221b9a3b5 100644 --- a/drivers/iommu/intel-iommu.c +++ b/drivers/iommu/intel-iommu.c @@ -4182,7 +4182,7 @@ int dmar_parse_one_atsr(struct acpi_dmar_header *hdr, void *arg) struct acpi_dmar_atsr *atsr; struct dmar_atsr_unit *atsru; - if (system_state != SYSTEM_BOOTING && !intel_iommu_enabled) + if (system_state >= SYSTEM_RUNNING && !intel_iommu_enabled) return 0; atsr = container_of(hdr, struct acpi_dmar_atsr, header); @@ -4431,7 +4431,7 @@ int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info) struct acpi_dmar_atsr *atsr; struct acpi_dmar_reserved_memory *rmrr; - if (!intel_iommu_enabled && system_state != SYSTEM_BOOTING) + if (!intel_iommu_enabled && system_state >= SYSTEM_RUNNING) return 0; list_for_each_entry(rmrru, &dmar_rmrr_units, list) {