Message ID | 20201222112714.24595-1-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | [4.4.y-cip] ARM: dts: iwg22d-sodimm: Fix dt nodes sorting | expand |
Hi, > -----Original Message----- > From: Lad Prabhakar [mailto:prabhakar.mahadev-lad.rj@bp.renesas.com] > Sent: Tuesday, December 22, 2020 8:27 PM > To: cip-dev@lists.cip-project.org; iwamatsu nobuhiro(岩松 信洋 □SWC◯ACT) > <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek <pavel@denx.de> > Cc: Biju Das <biju.das.jz@bp.renesas.com> > Subject: [PATCH 4.4.y-cip] ARM: dts: iwg22d-sodimm: Fix dt nodes sorting > > From: Biju Das <biju.das.jz@bp.renesas.com> > > commit 73aa5b7c941145b7a1a53f31b6a71dfe98007870 upstream. > > Some r8a7745-iwg22d-sodimm.dts device nodes are not sorted alphabetically. > This patch fixes the sorting of nodes and also fixes a typo in the stmpe > node. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > Link: https://lore.kernel.org/r/20200805142634.12252-1-biju.das.jz@bp.renesas.com > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> > [PL: Manually applied the changes] > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Looks good to me. I can apply if there are no other comments. Best regards, Nobuhiro > --- > arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 98 ++++++++++----------- > 1 file changed, 49 insertions(+), 49 deletions(-) > > diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts > index 5cd989556b60..5a1859446046 100644 > --- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts > +++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts > @@ -56,21 +56,33 @@ > clock-frequency = <26000000>; > }; > > - rsnd_sgtl5000: sound { > - compatible = "simple-audio-card"; > - simple-audio-card,format = "i2s"; > - simple-audio-card,bitclock-master = <&sndcodec>; > - simple-audio-card,frame-master = <&sndcodec>; > + backlight_lcd: backlight { > + compatible = "pwm-backlight"; > + pwms = <&tpu 3 5000000 PWM_POLARITY_INVERTED>; > + brightness-levels = <0 4 8 16 32 64 128 255>; > + default-brightness-level = <7>; > + }; > > - sndcpu: simple-audio-card,cpu { > - sound-dai = <&rcar_sound>; > - }; > + lcd_panel: lcd { > + compatible = "edt,etm043080dh6gp"; > + power-supply = <&vccq_panel>; > + backlight = <&backlight_lcd>; > > - sndcodec: simple-audio-card,codec { > - sound-dai = <&sgtl5000>; > + port { > + lcd_in: endpoint { > + remote-endpoint = <&du_out_rgb0>; > + }; > }; > }; > > + vccq_panel: regulator-vccq-panel { > + compatible = "regulator-fixed"; > + regulator-name = "Panel VccQ"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + gpio = <&gpio1 13 GPIO_ACTIVE_LOW>; > + }; > + > vccq_sdhi0: regulator-vccq-sdhi0 { > compatible = "regulator-gpio"; > > @@ -84,34 +96,29 @@ > 1800000 0>; > }; > > - vccq_panel: regulator-vccq-panel { > - compatible = "regulator-fixed"; > - regulator-name = "Panel VccQ"; > - regulator-min-microvolt = <3300000>; > - regulator-max-microvolt = <3300000>; > - gpio = <&gpio1 13 GPIO_ACTIVE_LOW>; > - }; > - > - backlight_lcd: backlight { > - compatible = "pwm-backlight"; > - pwms = <&tpu 3 5000000 PWM_POLARITY_INVERTED>; > - brightness-levels = <0 4 8 16 32 64 128 255>; > - default-brightness-level = <7>; > - }; > + rsnd_sgtl5000: sound { > + compatible = "simple-audio-card"; > + simple-audio-card,format = "i2s"; > + simple-audio-card,bitclock-master = <&sndcodec>; > + simple-audio-card,frame-master = <&sndcodec>; > > - lcd_panel: lcd { > - compatible = "edt,etm043080dh6gp"; > - power-supply = <&vccq_panel>; > - backlight = <&backlight_lcd>; > + sndcpu: simple-audio-card,cpu { > + sound-dai = <&rcar_sound>; > + }; > > - port { > - lcd_in: endpoint { > - remote-endpoint = <&du_out_rgb0>; > - }; > + sndcodec: simple-audio-card,codec { > + sound-dai = <&sgtl5000>; > }; > }; > }; > > +&can0 { > + pinctrl-0 = <&can0_pins>; > + pinctrl-names = "default"; > + > + status = "okay"; > +}; > + > &du { > pinctrl-0 = <&du0_pins>; > pinctrl-names = "default"; > @@ -127,13 +134,6 @@ > }; > }; > > -&can0 { > - pinctrl-0 = <&can0_pins>; > - pinctrl-names = "default"; > - > - status = "okay"; > -}; > - > &hscif1 { > pinctrl-0 = <&hscif1_pins>; > pinctrl-names = "default"; > @@ -149,6 +149,15 @@ > status = "okay"; > clock-frequency = <400000>; > > + sgtl5000: codec@a { > + compatible = "fsl,sgtl5000"; > + #sound-dai-cells = <0>; > + reg = <0x0a>; > + clocks = <&audio_clock>; > + VDDA-supply = <®_3p3v>; > + VDDIO-supply = <®_3p3v>; > + }; > + > stmpe811@44 { > compatible = "st,stmpe811"; > reg = <0x44>; > @@ -157,7 +166,7 @@ > > /* 3.25 MHz ADC clock speed */ > st,adc-freq = <1>; > - /* ADC converstion time: 80 clocks */ > + /* ADC conversation time: 80 clocks */ > st,sample-time = <4>; > /* 12-bit ADC */ > st,mod-12b = <1>; > @@ -181,15 +190,6 @@ > st,touch-det-delay = <5>; > }; > }; > - > - sgtl5000: codec@a { > - compatible = "fsl,sgtl5000"; > - #sound-dai-cells = <0>; > - reg = <0x0a>; > - clocks = <&audio_clock>; > - VDDA-supply = <®_3p3v>; > - VDDIO-supply = <®_3p3v>; > - }; > }; > > &pfc { > -- > 2.17.1 -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. View/Reply Online (#5972): https://lists.cip-project.org/g/cip-dev/message/5972 Mute This Topic: https://lists.cip-project.org/mt/79146851/4520388 Group Owner: cip-dev+owner@lists.cip-project.org Unsubscribe: https://lists.cip-project.org/g/cip-dev/leave/8129055/727948398/xyzzy [cip-dev@archiver.kernel.org] -=-=-=-=-=-=-=-=-=-=-=-
Hi! > From: Biju Das <biju.das.jz@bp.renesas.com> > > commit 73aa5b7c941145b7a1a53f31b6a71dfe98007870 upstream. > > Some r8a7745-iwg22d-sodimm.dts device nodes are not sorted alphabetically. > This patch fixes the sorting of nodes and also fixes a typo in the stmpe > node. I see why this is good idea for mainline, but do we need it in 4.4? I guess it makes patch backporting easier, but maybe that can wait for such backport? > /* 3.25 MHz ADC clock speed */ > st,adc-freq = <1>; > - /* ADC converstion time: 80 clocks */ > + /* ADC conversation time: 80 clocks */ > st,sample-time = <4>; I believe this is wrong. Should be "conversion"? Best regards, Pavel
Hi Pavel, Thank you for the review. > -----Original Message----- > From: Pavel Machek <pavel@denx.de> > Sent: 23 December 2020 00:13 > To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com> > Cc: cip-dev@lists.cip-project.org; Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek > <pavel@denx.de>; Biju Das <biju.das.jz@bp.renesas.com> > Subject: Re: [PATCH 4.4.y-cip] ARM: dts: iwg22d-sodimm: Fix dt nodes sorting > > Hi! > > > From: Biju Das <biju.das.jz@bp.renesas.com> > > > > commit 73aa5b7c941145b7a1a53f31b6a71dfe98007870 upstream. > > > > Some r8a7745-iwg22d-sodimm.dts device nodes are not sorted alphabetically. > > This patch fixes the sorting of nodes and also fixes a typo in the stmpe > > node. > > I see why this is good idea for mainline, but do we need it in 4.4? > Yes this is needed in 4.4-cip. > I guess it makes patch backporting easier, but maybe that can wait for > such backport? > Agreed will drop this for now and re-visit when such a instance occurs. > > /* 3.25 MHz ADC clock speed */ > > st,adc-freq = <1>; > > - /* ADC converstion time: 80 clocks */ > > + /* ADC conversation time: 80 clocks */ > > st,sample-time = <4>; > > I believe this is wrong. Should be "conversion"? > Oops. Cheers, Prabhakar > Best regards, > Pavel > -- > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. View/Reply Online (#5979): https://lists.cip-project.org/g/cip-dev/message/5979 Mute This Topic: https://lists.cip-project.org/mt/79146851/4520388 Group Owner: cip-dev+owner@lists.cip-project.org Unsubscribe: https://lists.cip-project.org/g/cip-dev/leave/8129055/727948398/xyzzy [cip-dev@archiver.kernel.org] -=-=-=-=-=-=-=-=-=-=-=-
diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts index 5cd989556b60..5a1859446046 100644 --- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts +++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts @@ -56,21 +56,33 @@ clock-frequency = <26000000>; }; - rsnd_sgtl5000: sound { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,bitclock-master = <&sndcodec>; - simple-audio-card,frame-master = <&sndcodec>; + backlight_lcd: backlight { + compatible = "pwm-backlight"; + pwms = <&tpu 3 5000000 PWM_POLARITY_INVERTED>; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <7>; + }; - sndcpu: simple-audio-card,cpu { - sound-dai = <&rcar_sound>; - }; + lcd_panel: lcd { + compatible = "edt,etm043080dh6gp"; + power-supply = <&vccq_panel>; + backlight = <&backlight_lcd>; - sndcodec: simple-audio-card,codec { - sound-dai = <&sgtl5000>; + port { + lcd_in: endpoint { + remote-endpoint = <&du_out_rgb0>; + }; }; }; + vccq_panel: regulator-vccq-panel { + compatible = "regulator-fixed"; + regulator-name = "Panel VccQ"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio1 13 GPIO_ACTIVE_LOW>; + }; + vccq_sdhi0: regulator-vccq-sdhi0 { compatible = "regulator-gpio"; @@ -84,34 +96,29 @@ 1800000 0>; }; - vccq_panel: regulator-vccq-panel { - compatible = "regulator-fixed"; - regulator-name = "Panel VccQ"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio1 13 GPIO_ACTIVE_LOW>; - }; - - backlight_lcd: backlight { - compatible = "pwm-backlight"; - pwms = <&tpu 3 5000000 PWM_POLARITY_INVERTED>; - brightness-levels = <0 4 8 16 32 64 128 255>; - default-brightness-level = <7>; - }; + rsnd_sgtl5000: sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + simple-audio-card,bitclock-master = <&sndcodec>; + simple-audio-card,frame-master = <&sndcodec>; - lcd_panel: lcd { - compatible = "edt,etm043080dh6gp"; - power-supply = <&vccq_panel>; - backlight = <&backlight_lcd>; + sndcpu: simple-audio-card,cpu { + sound-dai = <&rcar_sound>; + }; - port { - lcd_in: endpoint { - remote-endpoint = <&du_out_rgb0>; - }; + sndcodec: simple-audio-card,codec { + sound-dai = <&sgtl5000>; }; }; }; +&can0 { + pinctrl-0 = <&can0_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + &du { pinctrl-0 = <&du0_pins>; pinctrl-names = "default"; @@ -127,13 +134,6 @@ }; }; -&can0 { - pinctrl-0 = <&can0_pins>; - pinctrl-names = "default"; - - status = "okay"; -}; - &hscif1 { pinctrl-0 = <&hscif1_pins>; pinctrl-names = "default"; @@ -149,6 +149,15 @@ status = "okay"; clock-frequency = <400000>; + sgtl5000: codec@a { + compatible = "fsl,sgtl5000"; + #sound-dai-cells = <0>; + reg = <0x0a>; + clocks = <&audio_clock>; + VDDA-supply = <®_3p3v>; + VDDIO-supply = <®_3p3v>; + }; + stmpe811@44 { compatible = "st,stmpe811"; reg = <0x44>; @@ -157,7 +166,7 @@ /* 3.25 MHz ADC clock speed */ st,adc-freq = <1>; - /* ADC converstion time: 80 clocks */ + /* ADC conversation time: 80 clocks */ st,sample-time = <4>; /* 12-bit ADC */ st,mod-12b = <1>; @@ -181,15 +190,6 @@ st,touch-det-delay = <5>; }; }; - - sgtl5000: codec@a { - compatible = "fsl,sgtl5000"; - #sound-dai-cells = <0>; - reg = <0x0a>; - clocks = <&audio_clock>; - VDDA-supply = <®_3p3v>; - VDDIO-supply = <®_3p3v>; - }; }; &pfc {