@@ -1012,7 +1012,7 @@ struct ravb_hw_info {
netdev_features_t net_features;
int stats_len;
size_t max_rx_len;
- u32 tsrq;
+ u32 tccr_mask;
u32 rx_max_buf_size;
unsigned aligned_tx: 1;
@@ -1019,7 +1019,7 @@ static int ravb_stop_dma(struct net_device *ndev)
int error;
/* Wait for stopping the hardware TX process */
- error = ravb_wait(ndev, TCCR, info->tsrq, 0);
+ error = ravb_wait(ndev, TCCR, info->tccr_mask, 0);
if (error)
return error;
@@ -2408,7 +2408,7 @@ static const struct ravb_hw_info ravb_gen3_hw_info = {
.net_features = NETIF_F_RXCSUM,
.stats_len = ARRAY_SIZE(ravb_gstrings_stats),
.max_rx_len = RX_BUF_SZ + RAVB_ALIGN - 1,
- .tsrq = TCCR_TSRQ0 | TCCR_TSRQ1 | TCCR_TSRQ2 | TCCR_TSRQ3,
+ .tccr_mask = TCCR_TSRQ0 | TCCR_TSRQ1 | TCCR_TSRQ2 | TCCR_TSRQ3,
.rx_max_buf_size = SZ_2K,
.internal_delay = 1,
.tx_counters = 1,
@@ -2433,7 +2433,7 @@ static const struct ravb_hw_info ravb_gen2_hw_info = {
.net_features = NETIF_F_RXCSUM,
.stats_len = ARRAY_SIZE(ravb_gstrings_stats),
.max_rx_len = RX_BUF_SZ + RAVB_ALIGN - 1,
- .tsrq = TCCR_TSRQ0 | TCCR_TSRQ1 | TCCR_TSRQ2 | TCCR_TSRQ3,
+ .tccr_mask = TCCR_TSRQ0 | TCCR_TSRQ1 | TCCR_TSRQ2 | TCCR_TSRQ3,
.rx_max_buf_size = SZ_2K,
.aligned_tx = 1,
.gptp = 1,
@@ -2454,7 +2454,7 @@ static const struct ravb_hw_info gbeth_hw_info = {
.gstrings_size = sizeof(ravb_gstrings_stats_gbeth),
.stats_len = ARRAY_SIZE(ravb_gstrings_stats_gbeth),
.max_rx_len = ALIGN(GBETH_RX_BUFF_MAX, RAVB_ALIGN),
- .tsrq = TCCR_TSRQ0,
+ .tccr_mask = TCCR_TSRQ0,
.rx_max_buf_size = SZ_8K,
.aligned_tx = 1,
.tx_counters = 1,