Message ID | 20231213165248.975443-1-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | [6.1.y-cip] ASoC: dt-bindings: renesas,rz-ssi: Update interrupts and interrupt-names properties | expand |
Hi all, > -----Original Message----- > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > Sent: Thursday, December 14, 2023 1:53 AM > To: cip-dev@lists.cip-project.org; iwamatsu nobuhiro(岩松 信洋 ○DITC□ > DIT○OST) <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek > <pavel@denx.de> > Cc: Biju Das <biju.das.jz@bp.renesas.com> > Subject: [PATCH 6.1.y-cip] ASoC: dt-bindings: renesas,rz-ssi: Update > interrupts and interrupt-names properties > > commit 56a3840486ae22c42176828e25d4073712837bfd upstream. > > From R01UH0914EJ0120 Rev.1.20 HW manual, for full duplex channels > (SSI0/1/3) dma_rt interrupt has now being marked as reserved and similarly for > half duplex channel (SSI2) dma_rx and dma_tx interrupts have now being > marked as reserved (this applies to RZ/G2L and alike SoC's). This patch > updates the binding doc to match the same. > > While at it also updated the example node. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> > Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > Link: > https://lore.kernel.org/r/20230217185225.43310-2-prabhakar.mahadev-lad.rj > @bp.renesas.com > Signed-off-by: Mark Brown <broonie@kernel.org> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Looks good to me. Reviewed-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> Best regards, Nobuhiro > --- > Hi All, > > All the relevant driver patches and DT changes are already present v6.1-cip, > just the binding patch was missing. > - f3f3218a63af ("ASoC: sh: rz-ssi: Update interrupt handling for half duplex > channels") > - e83e635becb9 ("arm64: dts: renesas: r9a07g054: Update IRQ numbers for SSI > channels") > - 684fecd4f332 ("arm64: dts: renesas: r9a07g044: Update IRQ numbers for SSI > channel") > > Cheers, > Prabhakar > --- > .../bindings/sound/renesas,rz-ssi.yaml | 21 > +++++++++++-------- > 1 file changed, 12 insertions(+), 9 deletions(-) > > diff --git a/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml > b/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml > index 0d9840375132..5bd86a685cf7 100644 > --- a/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml > +++ b/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml > @@ -22,14 +22,18 @@ properties: > maxItems: 1 > > interrupts: > - maxItems: 4 > + minItems: 2 > + maxItems: 3 > > interrupt-names: > - items: > - - const: int_req > - - const: dma_rx > - - const: dma_tx > - - const: dma_rt > + oneOf: > + - items: > + - const: int_req > + - const: dma_rx > + - const: dma_tx > + - items: > + - const: int_req > + - const: dma_rt > > clocks: > maxItems: 4 > @@ -103,9 +107,8 @@ examples: > reg = <0x10049c00 0x400>; > interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, > <GIC_SPI 327 IRQ_TYPE_EDGE_RISING>, > - <GIC_SPI 328 IRQ_TYPE_EDGE_RISING>, > - <GIC_SPI 329 IRQ_TYPE_EDGE_RISING>; > - interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt"; > + <GIC_SPI 328 IRQ_TYPE_EDGE_RISING>; > + interrupt-names = "int_req", "dma_rx", "dma_tx"; > clocks = <&cpg CPG_MOD R9A07G044_SSI0_PCLK2>, > <&cpg CPG_MOD R9A07G044_SSI0_PCLK_SFR>, > <&audio_clk1>, > -- > 2.34.1
Hi! > > commit 56a3840486ae22c42176828e25d4073712837bfd upstream. > > > > From R01UH0914EJ0120 Rev.1.20 HW manual, for full duplex channels > > (SSI0/1/3) dma_rt interrupt has now being marked as reserved and similarly for > > half duplex channel (SSI2) dma_rx and dma_tx interrupts have now being > > marked as reserved (this applies to RZ/G2L and alike SoC's). This patch > > updates the binding doc to match the same. > > > > While at it also updated the example node. ... > Looks good to me. > Reviewed-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> Looks good to me, too. It only touches documentation, so I added your Reviewed-by and applied the patch. Best regards, Pavel
diff --git a/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml b/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml index 0d9840375132..5bd86a685cf7 100644 --- a/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml +++ b/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml @@ -22,14 +22,18 @@ properties: maxItems: 1 interrupts: - maxItems: 4 + minItems: 2 + maxItems: 3 interrupt-names: - items: - - const: int_req - - const: dma_rx - - const: dma_tx - - const: dma_rt + oneOf: + - items: + - const: int_req + - const: dma_rx + - const: dma_tx + - items: + - const: int_req + - const: dma_rt clocks: maxItems: 4 @@ -103,9 +107,8 @@ examples: reg = <0x10049c00 0x400>; interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 327 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 328 IRQ_TYPE_EDGE_RISING>, - <GIC_SPI 329 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt"; + <GIC_SPI 328 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "int_req", "dma_rx", "dma_tx"; clocks = <&cpg CPG_MOD R9A07G044_SSI0_PCLK2>, <&cpg CPG_MOD R9A07G044_SSI0_PCLK_SFR>, <&audio_clk1>,