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[RFC,24/30] riscv: dts: renesas: rzfive-smarc-som: Enable WDT

Message ID 20231220230646.219816-25-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive)
State New
Headers show
Series Add support for Renesas RZ/Five RISC-V SoC | expand

Commit Message

Lad Prabhakar Dec. 20, 2023, 11:06 p.m. UTC 
commit 3e9e6fc9c64f7b9b777c5b2c2e2c9a1326065137 upstream.

Enable WDT node on RZ/Five SMARC SoM.

Note, WDT block is enabled in RZ/G2UL SMARC SoM DTSI [0] hence deleting
the disabled node from RZ/Five SMARC SoM DTSI enables it here too as we
include [0] in RZ/Five SMARC SoM DTSI.

[0] arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20221118135715.14410-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi | 4 ----
 1 file changed, 4 deletions(-)
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Patch

diff --git a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
index 2b7672bc4b52..fdfd7cd2792b 100644
--- a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
+++ b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
@@ -41,7 +41,3 @@  &ostm2 {
 &sdhi0 {
 	status = "disabled";
 };
-
-&wdt0 {
-	status = "disabled";
-};