| Message ID | 20240108181612.5651-3-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add support for Renesas RZ/Five RISC-V SoC | expand |
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts b/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts index 8e0107df2d46..ddb193d007ac 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts +++ b/arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts @@ -28,6 +28,9 @@ #error "Cannot set as both PMOD_MTU3 and !SW_ET0_EN_N are mutually exclusive" #endif +/* Please set this macro to 1 for enabling SCI0 on PMOD1 */ +#define PMOD_SCI0_EN 0 + #include "r9a07g043u.dtsi" #include "rzg2ul-smarc-som.dtsi" #include "rzg2ul-smarc.dtsi" diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi index 019bab4ce8e4..727e3268a15b 100644 --- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi @@ -5,9 +5,6 @@ * Copyright (C) 2022 Renesas Electronics Corp. */ -/* Please set this macro to 1 for enabling SCI0 on PMOD1 */ -#define PMOD_SCI0_EN 0 - #include "rzg2ul-smarc-pinfunction.dtsi" #include "rz-smarc-common.dtsi"
It makes more sense to have all the configurable options in top level board DTS as we already have the configurable macros in there. This makes it easier for platforms who want to share the the DTS/I with other platforms/architectures. This change is in preparation for adding the Renesas RZ/Five RISC-V SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> --- arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts | 3 +++ arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi | 3 --- 2 files changed, 3 insertions(+), 3 deletions(-)