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([82.78.167.185]) by smtp.gmail.com with ESMTPSA id w23-20020a170907271700b00a556f2f18d6sm1816243ejk.57.2024.04.19.01.18.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 Apr 2024 01:18:32 -0700 (PDT) From: Claudiu X-Google-Original-From: Claudiu To: nobuhiro1.iwamatsu@toshiba.co.jp, pavel@denx.de Cc: cip-dev@lists.cip-project.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, claudiu.beznea@tuxon.dev Subject: [PATCH 5.10.y-cip 32/53] pinctrl: renesas: rzg2l: Add validation of GPIO pin in rzg2l_gpio_request() Date: Fri, 19 Apr 2024 11:17:21 +0300 Message-Id: <20240419081742.3496709-33-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240419081742.3496709-1-claudiu.beznea.uj@bp.renesas.com> References: <20240419081742.3496709-1-claudiu.beznea.uj@bp.renesas.com> MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Fri, 19 Apr 2024 08:18:38 -0000 X-Groupsio-URL: https://lists.cip-project.org/g/cip-dev/message/15619 From: Lad Prabhakar commit c944d9dea75e453d18bc8c100022e990c2eac3cb upstream. Validate the GPIO pin request in the rzg2l_gpio_request() callback using the rzg2l_validate_gpio_pin() function. This stops any accidental usage of GPIO pins which are not supported by the SoC. Signed-off-by: Lad Prabhakar Reviewed-by: Claudiu Beznea Reviewed-by: Geert Uytterhoeven Tested-by: Claudiu Beznea Link: https://lore.kernel.org/r/20230925154548.27048-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven Signed-off-by: Claudiu Beznea --- drivers/pinctrl/renesas/pinctrl-rzg2l.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c index beb6fd73c3fa..85d9d2895fc3 100644 --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c @@ -791,12 +791,18 @@ static const struct pinconf_ops rzg2l_pinctrl_confops = { static int rzg2l_gpio_request(struct gpio_chip *chip, unsigned int offset) { struct rzg2l_pinctrl *pctrl = gpiochip_get_data(chip); + const struct pinctrl_pin_desc *pin_desc = &pctrl->desc.pins[offset]; u32 port = RZG2L_PIN_ID_TO_PORT(offset); u8 bit = RZG2L_PIN_ID_TO_PIN(offset); + u32 *pin_data = pin_desc->drv_data; unsigned long flags; u8 reg8; int ret; + ret = rzg2l_validate_gpio_pin(pctrl, *pin_data, port, bit); + if (ret) + return ret; + ret = pinctrl_gpio_request(chip->base + offset); if (ret) return ret;