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([82.78.167.185]) by smtp.gmail.com with ESMTPSA id w23-20020a170907271700b00a556f2f18d6sm1816243ejk.57.2024.04.19.01.18.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 Apr 2024 01:18:53 -0700 (PDT) From: Claudiu X-Google-Original-From: Claudiu To: nobuhiro1.iwamatsu@toshiba.co.jp, pavel@denx.de Cc: cip-dev@lists.cip-project.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, claudiu.beznea@tuxon.dev Subject: [PATCH 5.10.y-cip 46/53] arm64: dts: renesas: Add initial device tree for RZ SMARC Carrier-II Board Date: Fri, 19 Apr 2024 11:17:35 +0300 Message-Id: <20240419081742.3496709-47-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240419081742.3496709-1-claudiu.beznea.uj@bp.renesas.com> References: <20240419081742.3496709-1-claudiu.beznea.uj@bp.renesas.com> MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Fri, 19 Apr 2024 08:18:58 -0000 X-Groupsio-URL: https://lists.cip-project.org/g/cip-dev/message/15633 From: Claudiu Beznea commit d1ae4200bb268fda8cf885e053306c2bd7deb62a upstream. Add the initial device tree for the RZ SMARC Carrier-II. At the moment it contains only the serial interface. Signed-off-by: Claudiu Beznea Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20230929053915.1530607-26-claudiu.beznea@bp.renesas.com Signed-off-by: Geert Uytterhoeven Signed-off-by: Claudiu Beznea --- arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi | 28 ++++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi new file mode 100644 index 000000000000..e7073a09ed2e --- /dev/null +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Device Tree Source for the RZ SMARC Carrier-II Board. + * + * Copyright (C) 2023 Renesas Electronics Corp. + */ + +#include +#include + +/ { + aliases { + serial0 = &scif0; + }; +}; + +&pinctrl { + scif0_pins: scif0 { + pinmux = , /* RXD */ + ; /* TXD */ + }; +}; + +&scif0 { + pinctrl-names = "default"; + pinctrl-0 = <&scif0_pins>; + status = "okay"; +};