diff mbox series

[isar-cip-core,v1,1/3] .gitlab-ci.yml: Break current test jobs to run one LAVA job per Gitlab job

Message ID 20240617182147.1724078-2-Sai.Sathujoda@toshiba-tsip.com (mailing list archive)
State Superseded
Headers show
Series Split Gitlab test jobs | expand

Commit Message

Sai.Sathujoda@toshiba-tsip.com June 17, 2024, 6:21 p.m. UTC 
From: sai ashrith sathujoda <sai.sathujoda@toshiba-tsip.com>

Signed-off-by: sai ashrith sathujoda <sai.sathujoda@toshiba-tsip.com>
---
 .gitlab-ci.yml | 80 ++++++++++++++++++++++++++++++++++++++++++++------
 1 file changed, 71 insertions(+), 9 deletions(-)

Comments

Jan Kiszka June 18, 2024, 4:38 a.m. UTC | #1 
On 17.06.24 20:21, Sai.Sathujoda@toshiba-tsip.com wrote:
> From: sai ashrith sathujoda <sai.sathujoda@toshiba-tsip.com>
> 
> Signed-off-by: sai ashrith sathujoda <sai.sathujoda@toshiba-tsip.com>
> ---
>  .gitlab-ci.yml | 80 ++++++++++++++++++++++++++++++++++++++++++++------
>  1 file changed, 71 insertions(+), 9 deletions(-)
> 
> diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
> index b3f1fc6..b567556 100644
> --- a/.gitlab-ci.yml
> +++ b/.gitlab-ci.yml
> @@ -26,6 +26,7 @@ variables:
>    deploy_kernelci: disable
>    build_swu_v2: disable
>    swupdate_version: default
> +  test_function: swupdate
>  
>  stages:
>    - build
> @@ -355,6 +356,8 @@ build:qemu-riscv64:
>    tags:
>      - small
>    allow_failure: true
> +  script:
> +    - scripts/submit_lava.sh ${test_function} ${target} ${CI_COMMIT_SHORT_SHA} ${release} ${CI_COMMIT_REF_SLUG}
>    artifacts:
>      name: "$CI_JOB_NAME"
>      when: always
> @@ -364,23 +367,82 @@ build:qemu-riscv64:
>      reports:
>        junit: results/results*.xml
>  
> -test-qemu-secure-boot:
> +test:qemu-amd64-secure-boot:
>    extends:
>      - .test-cip-core
> -  script:
> -    - scripts/submit_lava.sh secure-boot ${CI_COMMIT_SHA} ${release} ${CI_COMMIT_REF_SLUG}
> +  variables:
> +    target: qemu-amd64
> +    test_function: secure-boot
>  
> -test-qemu-swupdate:
> +test:qemu-arm64-secure-boot:
>    extends:
>      - .test-cip-core
> -  script:
> -    - scripts/submit_lava.sh swupdate ${CI_COMMIT_SHA} ${release} ${CI_COMMIT_REF_SLUG}
> +  variables:
> +    target: qemu-arm64
> +    test_function: secure-boot
> +
> +test:qemu-arm-secure-boot:
> +  extends:
> +    - .test-cip-core
> +  variables:
> +    target: qemu-arm
> +    test_function: secure-boot
> +
> +test:qemu-amd64-swupdate:
> +  extends:
> +    - .test-cip-core
> +  variables:
> +    target: qemu-amd64
> +    test_function: swupdate
> +
> +test:qemu-arm64-swupdate:
> +  extends:
> +    - .test-cip-core
> +  variables:
> +    target: qemu-arm64
> +    test_function: swupdate
> +
> +test:qemu-arm-swupdate:
> +  extends:
> +    - .test-cip-core
> +  variables:
> +    target: qemu-arm
> +    test_function: swupdate
> +
> +test:qemu-amd64-swupdate-kernel-panic:
> +  extends:
> +    - .test-cip-core
> +  variables:
> +    target: qemu-amd64
> +    test_function: kernel-panic
>  
> -test-qemu-IEC:
> +test:qemu-amd64-swupdate-initramfs-crash:
> +  extends:
> +    - .test-cip-core
> +  variables:
> +    target: qemu-amd64
> +    test_function: initramfs-crash
> +
> +test:qemu-amd64-IEC:
>    extends:
>     - .test-cip-core
> -  script:
> -    - scripts/submit_lava.sh IEC ${CI_COMMIT_SHA} ${release} ${CI_COMMIT_REF_SLUG}
> +  variables:
> +    target: qemu-amd64
> +    test_function: IEC
> +
> +test:qemu-arm64-IEC:
> +  extends:
> +   - .test-cip-core
> +  variables:
> +    target: qemu-arm64
> +    test_function: IEC
> +
> +test:qemu-arm-IEC:
> +  extends:
> +   - .test-cip-core
> +  variables:
> +    target: qemu-arm
> +    test_function: IEC
>  
>  cve-checks:
>    stage: cve-check

Does this work without patch 2? Or should both be folded together?

Jan
Sai.Sathujoda@toshiba-tsip.com June 18, 2024, 4:44 a.m. UTC | #2 
I am very sorry about this Jan. Yes, they must be squashed together. Let me re-order the patches and I 'll send v2 for this series now.

Thanks and regards,
Sai Ashrith Sathujoda (T S I P) 

-----Original Message-----
From: Jan Kiszka <jan.kiszka@siemens.com> 
Sent: Tuesday, June 18, 2024 10:09 AM
To: ashrith sai(ＴＳＩＰ) <Sai.Sathujoda@toshiba-tsip.com>; cip-dev@lists.cip-project.org
Cc: dinesh kumar(ＴＳＩＰ TMIEC ODG Porting) <dinesh.kumar@toshiba-tsip.com>; hayashi kazuhiro(林 和宏 ＤＭＥ ○ＤＩＧ□ＭＰＳ○ＭＰ４) <kazuhiro3.hayashi@toshiba.co.jp>
Subject: Re: [isar-cip-core v1 1/3] .gitlab-ci.yml: Break current test jobs to run one LAVA job per Gitlab job

On 17.06.24 20:21, Sai.Sathujoda@toshiba-tsip.com wrote:
> From: sai ashrith sathujoda <sai.sathujoda@toshiba-tsip.com>
> 
> Signed-off-by: sai ashrith sathujoda <sai.sathujoda@toshiba-tsip.com>
> ---
>  .gitlab-ci.yml | 80 
> ++++++++++++++++++++++++++++++++++++++++++++------
>  1 file changed, 71 insertions(+), 9 deletions(-)
> 
> diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index b3f1fc6..b567556 
> 100644
> --- a/.gitlab-ci.yml
> +++ b/.gitlab-ci.yml
> @@ -26,6 +26,7 @@ variables:
>    deploy_kernelci: disable
>    build_swu_v2: disable
>    swupdate_version: default
> +  test_function: swupdate
>  
>  stages:
>    - build
> @@ -355,6 +356,8 @@ build:qemu-riscv64:
>    tags:
>      - small
>    allow_failure: true
> +  script:
> +    - scripts/submit_lava.sh ${test_function} ${target} 
> + ${CI_COMMIT_SHORT_SHA} ${release} ${CI_COMMIT_REF_SLUG}
>    artifacts:
>      name: "$CI_JOB_NAME"
>      when: always
> @@ -364,23 +367,82 @@ build:qemu-riscv64:
>      reports:
>        junit: results/results*.xml
>  
> -test-qemu-secure-boot:
> +test:qemu-amd64-secure-boot:
>    extends:
>      - .test-cip-core
> -  script:
> -    - scripts/submit_lava.sh secure-boot ${CI_COMMIT_SHA} ${release} ${CI_COMMIT_REF_SLUG}
> +  variables:
> +    target: qemu-amd64
> +    test_function: secure-boot
>  
> -test-qemu-swupdate:
> +test:qemu-arm64-secure-boot:
>    extends:
>      - .test-cip-core
> -  script:
> -    - scripts/submit_lava.sh swupdate ${CI_COMMIT_SHA} ${release} ${CI_COMMIT_REF_SLUG}
> +  variables:
> +    target: qemu-arm64
> +    test_function: secure-boot
> +
> +test:qemu-arm-secure-boot:
> +  extends:
> +    - .test-cip-core
> +  variables:
> +    target: qemu-arm
> +    test_function: secure-boot
> +
> +test:qemu-amd64-swupdate:
> +  extends:
> +    - .test-cip-core
> +  variables:
> +    target: qemu-amd64
> +    test_function: swupdate
> +
> +test:qemu-arm64-swupdate:
> +  extends:
> +    - .test-cip-core
> +  variables:
> +    target: qemu-arm64
> +    test_function: swupdate
> +
> +test:qemu-arm-swupdate:
> +  extends:
> +    - .test-cip-core
> +  variables:
> +    target: qemu-arm
> +    test_function: swupdate
> +
> +test:qemu-amd64-swupdate-kernel-panic:
> +  extends:
> +    - .test-cip-core
> +  variables:
> +    target: qemu-amd64
> +    test_function: kernel-panic
>  
> -test-qemu-IEC:
> +test:qemu-amd64-swupdate-initramfs-crash:
> +  extends:
> +    - .test-cip-core
> +  variables:
> +    target: qemu-amd64
> +    test_function: initramfs-crash
> +
> +test:qemu-amd64-IEC:
>    extends:
>     - .test-cip-core
> -  script:
> -    - scripts/submit_lava.sh IEC ${CI_COMMIT_SHA} ${release} ${CI_COMMIT_REF_SLUG}
> +  variables:
> +    target: qemu-amd64
> +    test_function: IEC
> +
> +test:qemu-arm64-IEC:
> +  extends:
> +   - .test-cip-core
> +  variables:
> +    target: qemu-arm64
> +    test_function: IEC
> +
> +test:qemu-arm-IEC:
> +  extends:
> +   - .test-cip-core
> +  variables:
> +    target: qemu-arm
> +    test_function: IEC
>  
>  cve-checks:
>    stage: cve-check

Does this work without patch 2? Or should both be folded together?

Jan

--
Siemens AG, Technology
Linux Expert Center
diff mbox series

Patch

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index b3f1fc6..b567556 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -26,6 +26,7 @@  variables:
   deploy_kernelci: disable
   build_swu_v2: disable
   swupdate_version: default
+  test_function: swupdate
 
 stages:
   - build
@@ -355,6 +356,8 @@  build:qemu-riscv64:
   tags:
     - small
   allow_failure: true
+  script:
+    - scripts/submit_lava.sh ${test_function} ${target} ${CI_COMMIT_SHORT_SHA} ${release} ${CI_COMMIT_REF_SLUG}
   artifacts:
     name: "$CI_JOB_NAME"
     when: always
@@ -364,23 +367,82 @@  build:qemu-riscv64:
     reports:
       junit: results/results*.xml
 
-test-qemu-secure-boot:
+test:qemu-amd64-secure-boot:
   extends:
     - .test-cip-core
-  script:
-    - scripts/submit_lava.sh secure-boot ${CI_COMMIT_SHA} ${release} ${CI_COMMIT_REF_SLUG}
+  variables:
+    target: qemu-amd64
+    test_function: secure-boot
 
-test-qemu-swupdate:
+test:qemu-arm64-secure-boot:
   extends:
     - .test-cip-core
-  script:
-    - scripts/submit_lava.sh swupdate ${CI_COMMIT_SHA} ${release} ${CI_COMMIT_REF_SLUG}
+  variables:
+    target: qemu-arm64
+    test_function: secure-boot
+
+test:qemu-arm-secure-boot:
+  extends:
+    - .test-cip-core
+  variables:
+    target: qemu-arm
+    test_function: secure-boot
+
+test:qemu-amd64-swupdate:
+  extends:
+    - .test-cip-core
+  variables:
+    target: qemu-amd64
+    test_function: swupdate
+
+test:qemu-arm64-swupdate:
+  extends:
+    - .test-cip-core
+  variables:
+    target: qemu-arm64
+    test_function: swupdate
+
+test:qemu-arm-swupdate:
+  extends:
+    - .test-cip-core
+  variables:
+    target: qemu-arm
+    test_function: swupdate
+
+test:qemu-amd64-swupdate-kernel-panic:
+  extends:
+    - .test-cip-core
+  variables:
+    target: qemu-amd64
+    test_function: kernel-panic
 
-test-qemu-IEC:
+test:qemu-amd64-swupdate-initramfs-crash:
+  extends:
+    - .test-cip-core
+  variables:
+    target: qemu-amd64
+    test_function: initramfs-crash
+
+test:qemu-amd64-IEC:
   extends:
    - .test-cip-core
-  script:
-    - scripts/submit_lava.sh IEC ${CI_COMMIT_SHA} ${release} ${CI_COMMIT_REF_SLUG}
+  variables:
+    target: qemu-amd64
+    test_function: IEC
+
+test:qemu-arm64-IEC:
+  extends:
+   - .test-cip-core
+  variables:
+    target: qemu-arm64
+    test_function: IEC
+
+test:qemu-arm-IEC:
+  extends:
+   - .test-cip-core
+  variables:
+    target: qemu-arm
+    test_function: IEC
 
 cve-checks:
   stage: cve-check