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Mon, 31 Mar 2025 10:47:22 +0000 From: Tommaso Merciai To: cip-dev@lists.cip-project.org, Nobuhiro Iwamatsu , Pavel Machek CC: Biju Das , Lad Prabhakar , tomm.merciai@gmail.com Subject: [PATCH 6.1.y-cip 37/43] pinctrl: renesas: rzg2l: Add support for configuring schmitt-trigger Date: Mon, 31 Mar 2025 12:45:08 +0200 Message-ID: <20250331104514.79090-38-tommaso.merciai.xr@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250331104514.79090-1-tommaso.merciai.xr@bp.renesas.com> References: <20250331104514.79090-1-tommaso.merciai.xr@bp.renesas.com> X-ClientProxiedBy: FR4P281CA0148.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:b8::13) To OS9PR01MB13950.jpnprd01.prod.outlook.com (2603:1096:604:35e::5) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: OS9PR01MB13950:EE_|TY7PR01MB13744:EE_ X-MS-Office365-Filtering-Correlation-Id: bb1e18c9-2c02-499f-9dbb-08dd70416abf X-LD-Processed: 53d82571-da19-47e4-9cb4-625a166a4a2a,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|52116014|376014|366016|38350700014; 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Mon, 31 Mar 2025 10:47:31 -0000 X-Groupsio-URL: https://lists.cip-project.org/g/cip-dev/message/18425 From: Lad Prabhakar commit 725933a54f718af5362ec39971b2933d8bdf6994 upstream. Add support for configuring the multiplexed pins as schmitt-trigger inputs. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Tested-by: Claudiu Beznea Link: https://lore.kernel.org/20241004123658.764557-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven Signed-off-by: Tommaso Merciai --- drivers/pinctrl/renesas/pinctrl-rzg2l.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c index 834fac5db21e0..36f1a82352fbb 100644 --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c @@ -139,6 +139,7 @@ #define PUPD(off) (0x1C00 + (off) * 8) #define ISEL(off) (0x2C00 + (off) * 8) #define NOD(off) (0x3000 + (off) * 8) +#define SMT(off) (0x3400 + (off) * 8) #define SD_CH(off, ch) ((off) + (ch) * 4) #define ETH_POC(off, ch) ((off) + (ch) * 4) #define QSPI (0x3008) @@ -161,6 +162,7 @@ #define SR_MASK 0x01 #define PUPD_MASK 0x03 #define NOD_MASK 0x01 +#define SMT_MASK 0x01 #define PM_INPUT 0x1 #define PM_OUTPUT 0x2 @@ -1352,6 +1354,15 @@ static int rzg2l_pinctrl_pinconf_get(struct pinctrl_dev *pctldev, return -EINVAL; break; + case PIN_CONFIG_INPUT_SCHMITT_ENABLE: + if (!(cfg & PIN_CFG_SMT)) + return -EINVAL; + + arg = rzg2l_read_pin_config(pctrl, SMT(off), bit, SMT_MASK); + if (!arg) + return -EINVAL; + break; + case RENESAS_RZV2H_PIN_CONFIG_OUTPUT_IMPEDANCE: if (!(cfg & PIN_CFG_IOLH_RZV2H)) return -EINVAL; @@ -1490,6 +1501,13 @@ static int rzg2l_pinctrl_pinconf_set(struct pinctrl_dev *pctldev, param == PIN_CONFIG_DRIVE_OPEN_DRAIN ? 1 : 0); break; + case PIN_CONFIG_INPUT_SCHMITT_ENABLE: + if (!(cfg & PIN_CFG_SMT)) + return -EINVAL; + + rzg2l_rmw_pin_config(pctrl, SMT(off), bit, SMT_MASK, arg); + break; + case RENESAS_RZV2H_PIN_CONFIG_OUTPUT_IMPEDANCE: if (!(cfg & PIN_CFG_IOLH_RZV2H)) return -EINVAL;