[6.1.y-cip,03/43] dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Remove the check from the object

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

From: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
To: cip-dev@lists.cip-project.org,
	Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>,
	Pavel Machek <pavel@denx.de>
CC: Biju Das <biju.das.jz@bp.renesas.com>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	tomm.merciai@gmail.com
Subject: [PATCH 6.1.y-cip 03/43] dt-bindings: pinctrl: renesas,rzg2l-pinctrl:
 Remove the check from the object
Date: Mon, 31 Mar 2025 12:44:34 +0200
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Message ID	20250331104514.79090-4-tommaso.merciai.xr@bp.renesas.com (mailing list archive)
State	New
Headers	show Return-Path: <tommaso.merciai.xr@bp.renesas.com> ip: 40.107.74.18, mailfrom: tommaso.merciai.xr@bp.renesas.com) From: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> To: cip-dev@lists.cip-project.org, Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>, Pavel Machek <pavel@denx.de> CC: Biju Das <biju.das.jz@bp.renesas.com>, Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>, tomm.merciai@gmail.com Subject: [PATCH 6.1.y-cip 03/43] dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Remove the check from the object Date: Mon, 31 Mar 2025 12:44:34 +0200 Message-ID: <20250331104514.79090-4-tommaso.merciai.xr@bp.renesas.com> In-Reply-To: <20250331104514.79090-1-tommaso.merciai.xr@bp.renesas.com> References: <20250331104514.79090-1-tommaso.merciai.xr@bp.renesas.com> Content-Transfer-Encoding: quoted-printable Content-Type: text/plain MIME-Version: 1.0
Series	Add RZ/G3E pinctrl support \| expand [6.1.y-cip,00/43] Add RZ/G3E pinctrl support [6.1.y-cip,01/43] dt-bindings: pinctrl: renesas: Add alpha-numerical port support for RZ/V2H [6.1.y-cip,02/43] dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Allow 'input' and 'output-enable' pr… [6.1.y-cip,03/43] dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Remove the check from the object [6.1.y-cip,04/43] dt-bindings: pinctrl: renesas: Document RZ/V2H(P) SoC [6.1.y-cip,05/43] dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Allow schmitt and open drain propert… [6.1.y-cip,06/43] dt-bindings: pinctrl: renesas: Document RZ/G3E SoC [6.1.y-cip,07/43] pinctrl: renesas: rzg2l: Allow more bits for pin configuration [6.1.y-cip,08/43] pinctrl: renesas: rzg2l: Drop struct rzg2l_variable_pin_cfg [6.1.y-cip,09/43] pinctrl: renesas: rzg2l: Enable variable configuration for all [6.1.y-cip,10/43] pinctrl: renesas: rzg2l: Validate power registers for SD and ETH [6.1.y-cip,11/43] pinctrl: renesas: rzg2l: Add function pointer for PFC register locking [6.1.y-cip,12/43] pinctrl: renesas: rzg2l: Add function pointer for PMC register write [6.1.y-cip,13/43] pinctrl: renesas: rzg2l: Add function pointers for OEN register access [6.1.y-cip,14/43] pinctrl: renesas: rzg2l: Add support to configure slew-rate [6.1.y-cip,15/43] pinctrl: renesas: rzg2l: Add support for pull-up/down [6.1.y-cip,16/43] pinctrl: renesas: rzg2l: Pass pincontrol device to pinconf_generic_parse_dt_confi… [6.1.y-cip,17/43] pinctrl: renesas: rzg2l: Add support for custom parameters [6.1.y-cip,18/43] pinctrl: renesas: rzg2l: Acquire lock in rzg2l_pinctrl_pm_setup_pfc() [6.1.y-cip,19/43] pinctrl: renesas: rzg2l: Add support for RZ/V2H SoC [6.1.y-cip,20/43] pinctrl: renesas: rzg2l: Update PIN_CFG_MASK() macro to be 32-bit wide [6.1.y-cip,21/43] pinctrl: renesas: rzg2l: Adjust bit masks for PIN_CFG_VARIABLE to use BIT(62) [6.1.y-cip,22/43] pinctrl: renesas: rzg2l: Move RZG2L_SINGLE_PIN definition to top of the file [6.1.y-cip,23/43] pinctrl: renesas: rzg2l: Reorganize variable configuration macro [6.1.y-cip,24/43] pinctrl: renesas: rzg2l: Clarify OEN read/write support [6.1.y-cip,25/43] pinctrl: renesas: rzg2l: Clean up and refactor OEN read/write functions [6.1.y-cip,26/43] pinctrl: renesas: rzg2l: Support output enable on RZ/G2L [6.1.y-cip,27/43] pinctrl: renesas: rzg2l: Return -EINVAL if the pin doesn't support PIN_CFG_OEN [6.1.y-cip,28/43] pinctrl: renesas: rzg2l: Use dev_err_probe() [6.1.y-cip,29/43] mm/util: Introduce kmemdup_array() [6.1.y-cip,30/43] pinctrl: renesas: Switch to use kmemdup_array() [6.1.y-cip,31/43] pinctrl: renesas: rzg2l: Replace of_node_to_fwnode() with more suitable API [6.1.y-cip,32/43] pinctrl: renesas: rzg2l: Introduce single macro for digital noise filter configur… [6.1.y-cip,33/43] pinctrl: renesas: rzg2l: Move pinconf_to_config_argument() call outside of switch… [6.1.y-cip,34/43] pinctrl: renesas: rzg2l: Remove RZG2L_TINT_IRQ_START_INDEX [6.1.y-cip,35/43] pinctrl: renesas: rzg2l: Fix missing return in rzg2l_pinctrl_register() [6.1.y-cip,36/43] pinctrl: renesas: rzg2l: Add support for enabling/disabling open-drain outputs [6.1.y-cip,37/43] pinctrl: renesas: rzg2l: Add support for configuring schmitt-trigger [6.1.y-cip,38/43] pinctrl: renesas: rzg2l: Use gpiochip_populate_parent_fwspec_twocell helper [6.1.y-cip,39/43] pinctrl: renesas: rzg2l: Update r9a09g057_variable_pin_cfg table [6.1.y-cip,40/43] pinctrl: renesas: rzg2l: Add support for RZ/G3E SoC [6.1.y-cip,41/43] pinctrl: renesas: rzg2l: Fix PFC_MASK for RZ/V2H and RZ/G3E [6.1.y-cip,42/43] arm64: dts: renesas: r9a09g047: Add pincontrol node [6.1.y-cip,43/43] arm64: dts: renesas: r9a09g047e57-smarc: Add SCIF pincontrol

[6.1.y-cip,03/43] dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Remove the check from the object

Commit Message

Patch