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Subject: [PATCH 0/3] cxl/region: Cache management and region decode reset
fixes
From: Dan Williams <dan.j.williams@intel.com>
To: linux-cxl@vger.kernel.org
Cc: Jonathan Cameron <Jonathan.Cameron@Huawei.com>,
Vikram Sethi <vsethi@nvidia.com>
Date: Fri, 16 Jun 2023 18:24:23 -0700
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<168696506332.3590522.12981963617215460385.stgit@dwillia2-xfh.jf.intel.com>
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| Series |
cxl/region: Cache management and region decode reset fixes
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A recent conversation [1] highlighted the fact that the current location of cache management could cause problems for reconfiguring persistent memory devices, or accelerators in the future. As that touches paths near cxl_region_decode_reset() it reminded me of a pending bug in that area around handling reset failures [2]. Further details in the patches. [1]: http://lore.kernel.org/r/BYAPR12MB33364B5EB908BF7239BB996BBD53A@BYAPR12MB3336.namprd12.prod.outlook.com [2]: http://lore.kernel.org/r/20230316171441.0000205b@Huawei.com --- Dan Williams (3): cxl/region: Move cache invalidation before region teardown, and before setup cxl/region: Flag partially torn down regions as unusable cxl/region: Fix state transitions after reset failure drivers/cxl/core/region.c | 102 ++++++++++++++++++++++++++++----------------- drivers/cxl/cxl.h | 16 ++++--- 2 files changed, 72 insertions(+), 46 deletions(-)