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Thu, 3 Aug 2023 23:01:43 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by MWH0EPF000989EC.mail.protection.outlook.com (10.167.241.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6652.19 via Frontend Transport; Thu, 3 Aug 2023 23:01:43 +0000 Received: from ethanolx50f7host.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Thu, 3 Aug 2023 18:01:41 -0500 From: Smita Koralahalli To: , , CC: Bjorn Helgaas , , Lukas Wunner , Kuppuswamy Sathyanarayanan , Mahesh J Salgaonkar , Alison Schofield , "Vishal Verma" , Ira Weiny , "Ben Widawsky" , Dan Williams , Jonathan Cameron , Yazen Ghannam , Terry Bowman , Robert Richter , Smita Koralahalli Subject: [PATCH v3 0/3] PCI/AER, CXL: Fix appropriate _OSC check for CXL RAS Cap Date: Thu, 3 Aug 2023 23:01:26 +0000 Message-ID: <20230803230129.127590-1-Smita.KoralahalliChannabasappa@amd.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000989EC:EE_|DM6PR12MB4044:EE_ X-MS-Office365-Filtering-Correlation-Id: 06d7c4d3-7a95-4165-5af6-08db94759afe X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Aug 2023 23:01:43.3939 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 06d7c4d3-7a95-4165-5af6-08db94759afe X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989EC.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4044 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org This series of patches fixes the appropriate _OSC check for CXL RAS registers. First patch addresses the _OSC check. Second patch moves around pcie_aer_is_native() function declaration to a common location to be used by cxl/pci module and third patch reuses pcie_aer_is_native() in cxl/pci module. Link to v2: https://lore.kernel.org/all/20230721214740.256602-1-Smita.KoralahalliChannabasappa@amd.com Smita Koralahalli (3): cxl/pci: Fix appropriate checking for _OSC while handling CXL RAS registers PCI/AER: Export pcie_aer_is_native() cxl/pci: Replace host_bridge->native_aer with pcie_aer_is_native() drivers/cxl/pci.c | 7 +++---- drivers/pci/pcie/aer.c | 1 + drivers/pci/pcie/portdrv.h | 2 -- include/linux/aer.h | 2 ++ 4 files changed, 6 insertions(+), 6 deletions(-)