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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by SN1PEPF000397B2.mail.protection.outlook.com (10.167.248.56) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7741.18 via Frontend Transport; Mon, 1 Jul 2024 17:48:16 +0000 Received: from rric.localdomain (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Mon, 1 Jul 2024 12:48:14 -0500 From: Robert Richter To: Alison Schofield , Vishal Verma , Ira Weiny , Dan Williams , Jonathan Cameron , Dave Jiang , Davidlohr Bueso CC: , , "Robert Richter" Subject: [PATCH v2 0/5] Address translation for HDM decoding Date: Mon, 1 Jul 2024 19:47:48 +0200 Message-ID: <20240701174754.967954-1-rrichter@amd.com> X-Mailer: git-send-email 2.39.2 Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF000397B2:EE_|CH2PR12MB4103:EE_ X-MS-Office365-Filtering-Correlation-Id: edb9eab2-9ae6-4bcf-666e-08dc99f5fcf7 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|36860700013|376014; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Jul 2024 17:48:16.9095 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: edb9eab2-9ae6-4bcf-666e-08dc99f5fcf7 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF000397B2.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4103 Default expectation of Linux is that HPA == SPA, which means that hardware addresses in the decoders are the same as the kernel sees them. However, there are platforms where this is not the case and an address translation between decoder's (HPA) and the system's physical addresses (SPA) is needed. This series implements address translation for HDM decoding. The implementation follows the rule that the representation of hardware address ranges in the kernel are all SPA. If decoder registers (HDM decoder cap or register range) are not SPA, a base offset must be applied. Translation happens when accessing the registers back and forth. After a read access an address will be converted to SPA and before a write access the programmed address is translated from an SPA. The decoder register access can be easily encapsulated by address translation and thus there are only a few places where translation is needed and the code must be changed. This is implemented in patch #2, patch #1 is a prerequisite. Address translation is restricted to platforms that need it. As such a platform check is needed and a flag is introduced for this (patch #3). For address translation the base offset must be determined for the memory domain. Depending on the platform there are various options for this. The address range in the CEDT's CFWMS entry of the CXL host bridge can be used to determine the decoder's base address (patch #4). This is enabled for AMD Zen4 platforms (patch #5). Changelog: v2: * Fixed build error for other archs [kbot] Robert Richter (5): cxl/hdm: Moving HDM specific code to core/hdm.c. cxl/hdm: Implement address translation for HDM decoding cxl/acpi: Add platform flag for HPA address translation cxl/hdm: Setup HPA base for address translation using the HPA window in CFMWS cxl/acpi: Enable address translation for Zen4 platforms drivers/cxl/acpi.c | 16 +++ drivers/cxl/core/core.h | 2 + drivers/cxl/core/hdm.c | 245 ++++++++++++++++++++++++++++++++++++++-- drivers/cxl/core/pci.c | 119 +------------------ drivers/cxl/cxl.h | 2 + drivers/cxl/cxlmem.h | 4 + drivers/cxl/cxlpci.h | 3 - 7 files changed, 262 insertions(+), 129 deletions(-) base-commit: 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0