Message ID | 20240702143425.717452-1-Jonathan.Cameron@huawei.com |
---|---|
Headers | show |
Series | hw/cxl: Misc minor improvements | expand |
On Tue, 2 Jul 2024 15:34:22 +0100 Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote: > Before pushing on to more significant features a few unrelated patches > doing tidying up + one to avoid people setting the memory backend both > for a CXL type 3 device and as normal RAM in an attempt to get SRAT to > cover it correctly. We've had multiple 'bug' reports from this and if > nothing else I'd like to stop getting those! > > Based on master + the two DCD series Michael Tsirkin has queued. > > Based-on: [PATCH v8 00/14] Enabling DCD emulation support in Qemu > Based-on: https://lore.kernel.org/qemu-devel/20240523174651.1089554-1-nifan.cxl@gmail.com/ > Based-on: [PATCH qemu 0/2] hw/cxl: DCD tweaks and improvements. > Based-on: https://lore.kernel.org/qemu-devel/20240625170805.359278-1-Jonathan.Cameron@huawei.com/ I'll send a v2 that replaces the unused cfmw_list with the fix that makes us of it to avoid a crash. > > Fan Ni (1): > hw/cxl/cxl-mailbox-utils: remove unneeded mailbox output payload space > zeroing > > Jonathan Cameron (1): > hw/cxl: Check for multiple mappings of memory backends. > > Li Zhijian (1): > hw/cxl: Get rid of unused cfmw_list > > include/hw/cxl/cxl.h | 1 - > hw/cxl/cxl-host.c | 1 - > hw/cxl/cxl-mailbox-utils.c | 7 ------- > hw/mem/cxl_type3.c | 15 +++++++++++++++ > 4 files changed, 15 insertions(+), 9 deletions(-) >