Show patches with: Series = cxl/pci: Add support for RCH RAS error handling       |    Archived = No       |   18 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[v12,20/20] cxl/core/regs: Rework cxl_map_pmu_regs() to use map->dev for devm cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-10-18 Robert Richter Accepted
[v12,19/20] cxl/core/regs: Rename phys_addr in cxl_map_component_regs() cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-10-18 Robert Richter Accepted
[v12,18/20] PCI/AER: Unmask RCEC internal errors to enable RCH downstream port error handling cxl/pci: Add support for RCH RAS error handling 1 2 - --- 2023-10-18 Robert Richter Accepted
[v12,17/20] PCI/AER: Forward RCH downstream port-detected errors to the CXL.mem dev handler cxl/pci: Add support for RCH RAS error handling 1 2 - --- 2023-10-18 Robert Richter Accepted
[v12,16/20] cxl/pci: Disable root port interrupts in RCH mode cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-10-18 Robert Richter Accepted
[v12,15/20] cxl/pci: Add RCH downstream port error logging cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-10-18 Robert Richter Accepted
[v12,14/20] cxl/pci: Map RCH downstream AER registers for logging protocol errors cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-10-18 Robert Richter Accepted
[v12,13/20] cxl/pci: Update CXL error logging to use RAS register address cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-10-18 Robert Richter Accepted
[v12,12/20] PCI/AER: Refactor cper_print_aer() for use by CXL driver module cxl/pci: Add support for RCH RAS error handling 1 2 - --- 2023-10-18 Robert Richter Accepted
[v12,11/20] cxl/pci: Add RCH downstream port AER register discovery cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-10-18 Robert Richter Accepted
[v12,09/20] cxl/port: Remove Component Register base address from struct cxl_port cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-10-18 Robert Richter Accepted
[v12,08/20] cxl/pci: Remove Component Register base address from struct cxl_dev_state cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-10-18 Robert Richter Accepted
[v12,07/20] cxl/hdm: Use stored Component Register mappings to map HDM decoder capability cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-10-18 Robert Richter Accepted
[v12,06/20] cxl/pci: Store the endpoint's Component Register mappings in struct cxl_dev_state cxl/pci: Add support for RCH RAS error handling - 2 - --- 2023-10-18 Robert Richter Accepted
[v12,05/20] cxl/port: Pre-initialize component register mappings cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-10-18 Robert Richter Accepted
[v12,04/20] cxl/port: Rename @comp_map to @reg_map in struct cxl_register_map cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-10-18 Robert Richter Accepted
[v12,03/20] cxl/port: Fix @host confusion in cxl_dport_setup_regs() cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-10-18 Robert Richter Accepted
[v12,02/20] cxl/core/regs: Rename @dev to @host in struct cxl_register_map cxl/pci: Add support for RCH RAS error handling - 1 - --- 2023-10-18 Robert Richter Accepted