| Message ID | 165291689442.1426646.18012291761753694336.stgit@dwillia2-xfh |
|---|---|
| State | Accepted |
| Commit | dd2d42ad6f422076d1bd49b132bec74376c26f5c |
| Headers | show |
| Series | cxl: Fix "mem_enable" handling | expand |
diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c index ea6711721901..f3e59f8b6621 100644 --- a/drivers/cxl/core/pci.c +++ b/drivers/cxl/core/pci.c @@ -224,6 +224,8 @@ int cxl_dvsec_ranges(struct cxl_dev_state *cxlds, } info->mem_enabled = FIELD_GET(CXL_DVSEC_MEM_ENABLE, ctrl); + if (!info->mem_enabled) + return 0; for (i = 0; i < hdm_count; i++) { u64 base, size; diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c index 0cfbde134fc7..902d1f6e189e 100644 --- a/drivers/cxl/mem.c +++ b/drivers/cxl/mem.c @@ -92,7 +92,7 @@ __mock bool cxl_hdm_decode_init(struct cxl_dev_state *cxlds, * are expected even though Linux does not require or maintain that * match. */ - if (!global_enable && info->ranges) + if (!global_enable && info->mem_enabled && info->ranges) goto out; retval = true;
When a device does not have mem_enable set then the current range settings are moot. Skip the enumeration and cause cxl_hdm_decode_init() to proceed directly to enable the HDM Decoder Capability. Fixes: 560f78559006 ("cxl/pci: Retrieve CXL DVSEC memory info") Reviewed-by: Ira Weiny <ira.weiny@intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> --- drivers/cxl/core/pci.c | 2 ++ drivers/cxl/mem.c | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-)