diff mbox series

cxl: update var names for interleave ways conversion macros

Message ID 166552461397.1940763.17766745890158322847.stgit@djiang5-desk3.ch.intel.com
State New, archived
Headers show
Series cxl: update var names for interleave ways conversion macros | expand

Commit Message

Dave Jiang Oct. 11, 2022, 9:43 p.m. UTC
Change var names for interleave ways macros to clearly indicate which
variable is encoded and which is the actual ways value.

iw == interleave ways
eniw == encoded interleave ways

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
---
 drivers/cxl/cxl.h |   22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

Comments

Alison Schofield Oct. 12, 2022, 1:15 a.m. UTC | #1
On Tue, Oct 11, 2022 at 02:43:33PM -0700, Dave Jiang wrote:
> Change var names for interleave ways macros to clearly indicate which
> variable is encoded and which is the actual ways value.
> 
> iw == interleave ways
> eniw == encoded interleave ways
> 
> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
> ---
>  drivers/cxl/cxl.h |   22 +++++++++++-----------
>  1 file changed, 11 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> index 7a4f740d710c..c0d826084465 100644
> --- a/drivers/cxl/cxl.h
> +++ b/drivers/cxl/cxl.h
> @@ -78,14 +78,14 @@ static inline int cxl_to_granularity(u16 enig, unsigned int *ig)
>  }
>  
>  /* Encode defined in CXL ECN "3, 6, 12 and 16-way memory Interleaving" */
> -static inline int cxl_to_ways(u8 eniw, unsigned int *val)
> +static inline int cxl_to_ways(u8 eniw, unsigned int *iw)

How about -
+static inline int cxl_eniw_to_ways(u8 eniw, unsigned int *ways)
+static inline int cxl_ways_to_eniw(unsigned int ways, u8 *eniw)

and similarly for granularity.

I think 'ways' (same with 'granularity') is used more in the drivers,
although core/region.c uses iw often.

What you have is certainly clearer, so just chiming in here.

Alison

>  {
>  	switch (eniw) {
>  	case 0 ... 4:
> -		*val = 1 << eniw;
> +		*iw = 1 << eniw;
>  		break;
>  	case 8 ... 10:
> -		*val = 3 << (eniw - 8);
> +		*iw = 3 << (eniw - 8);
>  		break;
>  	default:
>  		return -EINVAL;
> @@ -102,20 +102,20 @@ static inline int granularity_to_cxl(int ig, u16 *enig)
>  	return 0;
>  }
>  
> -static inline int ways_to_cxl(unsigned int ways, u8 *iw)
> +static inline int ways_to_cxl(unsigned int iw, u8 *eniw)
>  {
> -	if (ways > 16)
> +	if (iw > 16)
>  		return -EINVAL;
> -	if (is_power_of_2(ways)) {
> -		*iw = ilog2(ways);
> +	if (is_power_of_2(iw)) {
> +		*eniw = ilog2(iw);
>  		return 0;
>  	}
> -	if (ways % 3)
> +	if (iw % 3)
>  		return -EINVAL;
> -	ways /= 3;
> -	if (!is_power_of_2(ways))
> +	iw /= 3;
> +	if (!is_power_of_2(iw))
>  		return -EINVAL;
> -	*iw = ilog2(ways) + 8;
> +	*eniw = ilog2(iw) + 8;
>  	return 0;
>  }
>  
> 
>
Alison Schofield Oct. 12, 2022, 1:18 a.m. UTC | #2
On Tue, Oct 11, 2022 at 02:43:33PM -0700, Dave Jiang wrote:
> Change var names for interleave ways macros to clearly indicate which
> variable is encoded and which is the actual ways value.
> 
> iw == interleave ways
> eniw == encoded interleave ways
> 
> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
> ---
>  drivers/cxl/cxl.h |   22 +++++++++++-----------
>  1 file changed, 11 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> index 7a4f740d710c..c0d826084465 100644
> --- a/drivers/cxl/cxl.h
> +++ b/drivers/cxl/cxl.h
> @@ -78,14 +78,14 @@ static inline int cxl_to_granularity(u16 enig, unsigned int *ig)
>  }
>  
>  /* Encode defined in CXL ECN "3, 6, 12 and 16-way memory Interleaving" */

Above comment can be updated:
CXL 8.2.4.19.7 CXL HDM Decoder n Control Register


> -static inline int cxl_to_ways(u8 eniw, unsigned int *val)
> +static inline int cxl_to_ways(u8 eniw, unsigned int *iw)
>  {
>  	switch (eniw) {
>  	case 0 ... 4:
> -		*val = 1 << eniw;
> +		*iw = 1 << eniw;
>  		break;
>  	case 8 ... 10:
> -		*val = 3 << (eniw - 8);
> +		*iw = 3 << (eniw - 8);
>  		break;
>  	default:
>  		return -EINVAL;
> @@ -102,20 +102,20 @@ static inline int granularity_to_cxl(int ig, u16 *enig)
>  	return 0;
>  }
>  
> -static inline int ways_to_cxl(unsigned int ways, u8 *iw)
> +static inline int ways_to_cxl(unsigned int iw, u8 *eniw)
>  {
> -	if (ways > 16)
> +	if (iw > 16)
>  		return -EINVAL;
> -	if (is_power_of_2(ways)) {
> -		*iw = ilog2(ways);
> +	if (is_power_of_2(iw)) {
> +		*eniw = ilog2(iw);
>  		return 0;
>  	}
> -	if (ways % 3)
> +	if (iw % 3)
>  		return -EINVAL;
> -	ways /= 3;
> -	if (!is_power_of_2(ways))
> +	iw /= 3;
> +	if (!is_power_of_2(iw))
>  		return -EINVAL;
> -	*iw = ilog2(ways) + 8;
> +	*eniw = ilog2(iw) + 8;
>  	return 0;
>  }
>  
> 
>
Jonathan Cameron Oct. 12, 2022, 12:45 p.m. UTC | #3
On Tue, 11 Oct 2022 18:18:28 -0700
Alison Schofield <alison.schofield@intel.com> wrote:

> On Tue, Oct 11, 2022 at 02:43:33PM -0700, Dave Jiang wrote:
> > Change var names for interleave ways macros to clearly indicate which
> > variable is encoded and which is the actual ways value.
> > 
> > iw == interleave ways
> > eniw == encoded interleave ways
> > 
> > Signed-off-by: Dave Jiang <dave.jiang@intel.com>
> > ---
> >  drivers/cxl/cxl.h |   22 +++++++++++-----------
> >  1 file changed, 11 insertions(+), 11 deletions(-)
> > 
> > diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> > index 7a4f740d710c..c0d826084465 100644
> > --- a/drivers/cxl/cxl.h
> > +++ b/drivers/cxl/cxl.h
> > @@ -78,14 +78,14 @@ static inline int cxl_to_granularity(u16 enig, unsigned int *ig)
> >  }
> >  
> >  /* Encode defined in CXL ECN "3, 6, 12 and 16-way memory Interleaving" */  
> 
> Above comment can be updated:
> CXL 8.2.4.19.7 CXL HDM Decoder n Control Register

Needs spec revision number.

CXL rev 3.0 8.2.4.....

J
Dave Jiang Oct. 12, 2022, 3:47 p.m. UTC | #4
On 10/11/2022 6:15 PM, Alison Schofield wrote:
> On Tue, Oct 11, 2022 at 02:43:33PM -0700, Dave Jiang wrote:
>> Change var names for interleave ways macros to clearly indicate which
>> variable is encoded and which is the actual ways value.
>>
>> iw == interleave ways
>> eniw == encoded interleave ways
>>
>> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
>> ---
>>   drivers/cxl/cxl.h |   22 +++++++++++-----------
>>   1 file changed, 11 insertions(+), 11 deletions(-)
>>
>> diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
>> index 7a4f740d710c..c0d826084465 100644
>> --- a/drivers/cxl/cxl.h
>> +++ b/drivers/cxl/cxl.h
>> @@ -78,14 +78,14 @@ static inline int cxl_to_granularity(u16 enig, unsigned int *ig)
>>   }
>>   
>>   /* Encode defined in CXL ECN "3, 6, 12 and 16-way memory Interleaving" */
>> -static inline int cxl_to_ways(u8 eniw, unsigned int *val)
>> +static inline int cxl_to_ways(u8 eniw, unsigned int *iw)
> How about -
> +static inline int cxl_eniw_to_ways(u8 eniw, unsigned int *ways)
> +static inline int cxl_ways_to_eniw(unsigned int ways, u8 *eniw)

Sure. I was trying to keep the patch small. But may as well get it all 
updated.


>
> and similarly for granularity.
>
> I think 'ways' (same with 'granularity') is used more in the drivers,
> although core/region.c uses iw often.
>
> What you have is certainly clearer, so just chiming in here.
>
> Alison
>
>>   {
>>   	switch (eniw) {
>>   	case 0 ... 4:
>> -		*val = 1 << eniw;
>> +		*iw = 1 << eniw;
>>   		break;
>>   	case 8 ... 10:
>> -		*val = 3 << (eniw - 8);
>> +		*iw = 3 << (eniw - 8);
>>   		break;
>>   	default:
>>   		return -EINVAL;
>> @@ -102,20 +102,20 @@ static inline int granularity_to_cxl(int ig, u16 *enig)
>>   	return 0;
>>   }
>>   
>> -static inline int ways_to_cxl(unsigned int ways, u8 *iw)
>> +static inline int ways_to_cxl(unsigned int iw, u8 *eniw)
>>   {
>> -	if (ways > 16)
>> +	if (iw > 16)
>>   		return -EINVAL;
>> -	if (is_power_of_2(ways)) {
>> -		*iw = ilog2(ways);
>> +	if (is_power_of_2(iw)) {
>> +		*eniw = ilog2(iw);
>>   		return 0;
>>   	}
>> -	if (ways % 3)
>> +	if (iw % 3)
>>   		return -EINVAL;
>> -	ways /= 3;
>> -	if (!is_power_of_2(ways))
>> +	iw /= 3;
>> +	if (!is_power_of_2(iw))
>>   		return -EINVAL;
>> -	*iw = ilog2(ways) + 8;
>> +	*eniw = ilog2(iw) + 8;
>>   	return 0;
>>   }
>>   
>>
>>
Dave Jiang Oct. 12, 2022, 3:47 p.m. UTC | #5
On 10/11/2022 6:18 PM, Alison Schofield wrote:
> On Tue, Oct 11, 2022 at 02:43:33PM -0700, Dave Jiang wrote:
>> Change var names for interleave ways macros to clearly indicate which
>> variable is encoded and which is the actual ways value.
>>
>> iw == interleave ways
>> eniw == encoded interleave ways
>>
>> Signed-off-by: Dave Jiang <dave.jiang@intel.com>
>> ---
>>   drivers/cxl/cxl.h |   22 +++++++++++-----------
>>   1 file changed, 11 insertions(+), 11 deletions(-)
>>
>> diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
>> index 7a4f740d710c..c0d826084465 100644
>> --- a/drivers/cxl/cxl.h
>> +++ b/drivers/cxl/cxl.h
>> @@ -78,14 +78,14 @@ static inline int cxl_to_granularity(u16 enig, unsigned int *ig)
>>   }
>>   
>>   /* Encode defined in CXL ECN "3, 6, 12 and 16-way memory Interleaving" */
> Above comment can be updated:
> CXL 8.2.4.19.7 CXL HDM Decoder n Control Register
That probably needs to be a different patch.
>
>
>> -static inline int cxl_to_ways(u8 eniw, unsigned int *val)
>> +static inline int cxl_to_ways(u8 eniw, unsigned int *iw)
>>   {
>>   	switch (eniw) {
>>   	case 0 ... 4:
>> -		*val = 1 << eniw;
>> +		*iw = 1 << eniw;
>>   		break;
>>   	case 8 ... 10:
>> -		*val = 3 << (eniw - 8);
>> +		*iw = 3 << (eniw - 8);
>>   		break;
>>   	default:
>>   		return -EINVAL;
>> @@ -102,20 +102,20 @@ static inline int granularity_to_cxl(int ig, u16 *enig)
>>   	return 0;
>>   }
>>   
>> -static inline int ways_to_cxl(unsigned int ways, u8 *iw)
>> +static inline int ways_to_cxl(unsigned int iw, u8 *eniw)
>>   {
>> -	if (ways > 16)
>> +	if (iw > 16)
>>   		return -EINVAL;
>> -	if (is_power_of_2(ways)) {
>> -		*iw = ilog2(ways);
>> +	if (is_power_of_2(iw)) {
>> +		*eniw = ilog2(iw);
>>   		return 0;
>>   	}
>> -	if (ways % 3)
>> +	if (iw % 3)
>>   		return -EINVAL;
>> -	ways /= 3;
>> -	if (!is_power_of_2(ways))
>> +	iw /= 3;
>> +	if (!is_power_of_2(iw))
>>   		return -EINVAL;
>> -	*iw = ilog2(ways) + 8;
>> +	*eniw = ilog2(iw) + 8;
>>   	return 0;
>>   }
>>   
>>
>>
diff mbox series

Patch

diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
index 7a4f740d710c..c0d826084465 100644
--- a/drivers/cxl/cxl.h
+++ b/drivers/cxl/cxl.h
@@ -78,14 +78,14 @@  static inline int cxl_to_granularity(u16 enig, unsigned int *ig)
 }
 
 /* Encode defined in CXL ECN "3, 6, 12 and 16-way memory Interleaving" */
-static inline int cxl_to_ways(u8 eniw, unsigned int *val)
+static inline int cxl_to_ways(u8 eniw, unsigned int *iw)
 {
 	switch (eniw) {
 	case 0 ... 4:
-		*val = 1 << eniw;
+		*iw = 1 << eniw;
 		break;
 	case 8 ... 10:
-		*val = 3 << (eniw - 8);
+		*iw = 3 << (eniw - 8);
 		break;
 	default:
 		return -EINVAL;
@@ -102,20 +102,20 @@  static inline int granularity_to_cxl(int ig, u16 *enig)
 	return 0;
 }
 
-static inline int ways_to_cxl(unsigned int ways, u8 *iw)
+static inline int ways_to_cxl(unsigned int iw, u8 *eniw)
 {
-	if (ways > 16)
+	if (iw > 16)
 		return -EINVAL;
-	if (is_power_of_2(ways)) {
-		*iw = ilog2(ways);
+	if (is_power_of_2(iw)) {
+		*eniw = ilog2(iw);
 		return 0;
 	}
-	if (ways % 3)
+	if (iw % 3)
 		return -EINVAL;
-	ways /= 3;
-	if (!is_power_of_2(ways))
+	iw /= 3;
+	if (!is_power_of_2(iw))
 		return -EINVAL;
-	*iw = ilog2(ways) + 8;
+	*eniw = ilog2(iw) + 8;
 	return 0;
 }