| Message ID | 166845667383.1449826.14492184009399164787.stgit@dwillia2-xfh.jf.intel.com |
|---|---|
| State | Accepted |
| Commit | 76f191108419424fef1bb713d8d160c3b49bedc4 |
| Headers | show |
| Series | tools/testing/cxl: Add bridge mocking support | expand |
On 14.11.22 12:11:13, Dan Williams wrote: > In preparation for cxl_acpi walking pci_root->bus->bridge, add that > association to the mock pci_root instances. > > Note that the missing 3rd entry in mock_pci_root[] was not noticed until > now given that the test version of to_cxl_host_bridge() > (tools/testing/cxl/mock_acpi.c), obviated the need for that entry. > However, "cxl/acpi: Improve debug messages in cxl_acpi_probe()" [1] > needs pci_root->bus->bridge to be populated. Patch looks good to me, though we might want to move the mock_pci_root[] fix into e41c8452b9b2 or on top as a separate change. For patch logistics, could you merge that changes into the rch tree as a new base? Right now I have cherry picked e41c8452b9b2 and this one as pre-requisites of my series. -Robert > > Link: https://lore.kernel.org/r/20221018132341.76259-6-rrichter@amd.com [1] > Cc: Robert Richter <rrichter@amd.com> > Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Robert Richter wrote: > On 14.11.22 12:11:13, Dan Williams wrote: > > In preparation for cxl_acpi walking pci_root->bus->bridge, add that > > association to the mock pci_root instances. > > > > Note that the missing 3rd entry in mock_pci_root[] was not noticed until > > now given that the test version of to_cxl_host_bridge() > > (tools/testing/cxl/mock_acpi.c), obviated the need for that entry. > > However, "cxl/acpi: Improve debug messages in cxl_acpi_probe()" [1] > > needs pci_root->bus->bridge to be populated. > > Patch looks good to me, though we might want to move the > mock_pci_root[] fix into e41c8452b9b2 or on top as a separate change. > > For patch logistics, could you merge that changes into the rch tree as > a new base? Right now I have cherry picked e41c8452b9b2 and this one > as pre-requisites of my series. Yes, I re-rolled the series on -rc4. Will post a new baseline once I have the unit test topology ready later today.
On Mon, 14 Nov 2022 12:11:13 -0800 Dan Williams <dan.j.williams@intel.com> wrote: > In preparation for cxl_acpi walking pci_root->bus->bridge, add that > association to the mock pci_root instances. > > Note that the missing 3rd entry in mock_pci_root[] was not noticed until > now given that the test version of to_cxl_host_bridge() > (tools/testing/cxl/mock_acpi.c), obviated the need for that entry. > However, "cxl/acpi: Improve debug messages in cxl_acpi_probe()" [1] > needs pci_root->bus->bridge to be populated. > > Link: https://lore.kernel.org/r/20221018132341.76259-6-rrichter@amd.com [1] > Cc: Robert Richter <rrichter@amd.com> > Signed-off-by: Dan Williams <dan.j.williams@intel.com> > --- > tools/testing/cxl/test/cxl.c | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) > > diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c > index a5146d80ecc4..facfcd11cb67 100644 > --- a/tools/testing/cxl/test/cxl.c > +++ b/tools/testing/cxl/test/cxl.c > @@ -439,14 +439,18 @@ mock_acpi_evaluate_integer(acpi_handle handle, acpi_string pathname, > return AE_OK; > } > > -static struct pci_bus mock_pci_bus[NR_CXL_HOST_BRIDGES]; > -static struct acpi_pci_root mock_pci_root[NR_CXL_HOST_BRIDGES] = { > +static struct pci_bus mock_pci_bus[NR_CXL_HOST_BRIDGES + NR_CXL_SINGLE_HOST]; > +static struct acpi_pci_root mock_pci_root[ARRAY_SIZE(mock_pci_bus)] = { > [0] = { > .bus = &mock_pci_bus[0], > }, > [1] = { > .bus = &mock_pci_bus[1], > }, > + [2] = { > + .bus = &mock_pci_bus[2], > + }, > + Ahah. Here's the stray space that gets cleaned up in the RCH series. Guessing you don't want to rebase to fix it here? > };
diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c index a5146d80ecc4..facfcd11cb67 100644 --- a/tools/testing/cxl/test/cxl.c +++ b/tools/testing/cxl/test/cxl.c @@ -439,14 +439,18 @@ mock_acpi_evaluate_integer(acpi_handle handle, acpi_string pathname, return AE_OK; } -static struct pci_bus mock_pci_bus[NR_CXL_HOST_BRIDGES]; -static struct acpi_pci_root mock_pci_root[NR_CXL_HOST_BRIDGES] = { +static struct pci_bus mock_pci_bus[NR_CXL_HOST_BRIDGES + NR_CXL_SINGLE_HOST]; +static struct acpi_pci_root mock_pci_root[ARRAY_SIZE(mock_pci_bus)] = { [0] = { .bus = &mock_pci_bus[0], }, [1] = { .bus = &mock_pci_bus[1], }, + [2] = { + .bus = &mock_pci_bus[2], + }, + }; static bool is_mock_bus(struct pci_bus *bus) @@ -744,6 +748,7 @@ static __init int cxl_single_init(void) } cxl_hb_single[i] = pdev; + mock_pci_bus[i + NR_CXL_HOST_BRIDGES].bridge = &pdev->dev; rc = sysfs_create_link(&pdev->dev.kobj, &pdev->dev.kobj, "physical_node"); if (rc) @@ -910,6 +915,7 @@ static __init int cxl_test_init(void) } cxl_host_bridge[i] = pdev; + mock_pci_bus[i].bridge = &pdev->dev; rc = sysfs_create_link(&pdev->dev.kobj, &pdev->dev.kobj, "physical_node"); if (rc)
In preparation for cxl_acpi walking pci_root->bus->bridge, add that association to the mock pci_root instances. Note that the missing 3rd entry in mock_pci_root[] was not noticed until now given that the test version of to_cxl_host_bridge() (tools/testing/cxl/mock_acpi.c), obviated the need for that entry. However, "cxl/acpi: Improve debug messages in cxl_acpi_probe()" [1] needs pci_root->bus->bridge to be populated. Link: https://lore.kernel.org/r/20221018132341.76259-6-rrichter@amd.com [1] Cc: Robert Richter <rrichter@amd.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> --- tools/testing/cxl/test/cxl.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-)