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Wysocki" , Len Brown , Jonathan Cameron , "Davidlohr Bueso" , Dave Jiang , Robert Richter Subject: [PATCH v3 4/9] cxl/mem: Skip intermediate port enumeration of restricted endpoints (RCDs) Date: Wed, 9 Nov 2022 11:40:54 +0100 Message-ID: <20221109104059.766720-5-rrichter@amd.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221109104059.766720-1-rrichter@amd.com> References: <20221109104059.766720-1-rrichter@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT031:EE_|DM6PR12MB4217:EE_ X-MS-Office365-Filtering-Correlation-Id: f02be110-c5fe-4432-c41d-08dac23ef78e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: FfGGGblVlpaC5xC8B9kIIV8/QMzZl+3QX7kfyHCVzq2jfPK/1Box8j9P5o8fWKVp2j8AOjHt6Hncug/CvrStzfO8LbX2jk4Y26/neDhFO+AEkfqMioWAL5XGBIPU059vh/Mwfr0bKRmcD1sox/VNXv8AJfFxet8DJbXfhGKJSvDmML1NIC7iw25QLbnmuKdAYz6I2nHuCa2g/oSdeqBmz8K/Xt7n/5aAemorkz/tt6MFoC5AFfr64EvzM+CDUUJLkb3Zbk/b/CBOVBwKhoneMZKhoPNgZf4Wz49xFGs1tXgJ5zODV/dC2Ajx+rhC5c9aX8Jk7o6oV6yzjYIbXmsYzhTmcrn2BI1X1BtCuJN1xnW4G7LweQbCc53GvhQdEX9lX+UNlm0uiraQAgwPSkrcnqjPPm2nxwcmEC7CRFnU62y6lNH1LSUKBHudgz3g+L6HLMWEbbovciq6PGPVRefKHjNTcrpIJ3xSv0SfBaWJ2OFdwDhO7UhlRMmmP9Wq8WWIluRAv1LZk+ldDUjguMGpwTQSTRhSVcWxYDJWvOFWBGkvdCG87AG4jSFjUxawIKDsOAN/aHkiocwb5+Z6uV8dP/lbE/qCyT8cQfCPVPXPl/u6mKb0fgdghpVNXgpJgNTdq6BDza+kJNC0MLOaYC25Kkl4VTZ5lLx6VkZwgbTqhlQrMoG2PQmAEq1yHfL+AQ9YgHoo7tNfNk3Vnex2BfOUy9OcqTi8sT8iVQCEv3xhqCORpUY/ARupMPo1VH+12c4WklNv2yh1vXN0RKsKRQIdaaABgmMJW3EgMIGr6+2fKiS5D+SyEQeJ/vLnAFkhTs9U X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(346002)(136003)(376002)(39860400002)(396003)(451199015)(46966006)(40470700004)(36840700001)(82310400005)(478600001)(356005)(6666004)(81166007)(54906003)(110136005)(316002)(26005)(426003)(47076005)(40480700001)(70206006)(70586007)(4326008)(82740400003)(8676002)(7416002)(41300700001)(5660300002)(8936002)(36756003)(2616005)(186003)(1076003)(16526019)(40460700003)(83380400001)(2906002)(36860700001)(336012)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Nov 2022 10:41:32.2967 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f02be110-c5fe-4432-c41d-08dac23ef78e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT031.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4217 Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org When an endpoint is found, all ports in beetween the endpoint and the CXL host bridge need to be created. In the RCH case there are no ports in between a host bridge and the endpoint. Skip the enumeration of intermediate ports. The port enumeration does not only create all ports, it also initializes the endpoint chain by adding the endpoint to every downstream port up to the root bridge. This must be done also in RCD mode, but is much more simple as the endpoint only needs to be added to the host bridge's dport. Note: For endpoint removal the cxl_detach_ep() is not needed as it is released in cxl_port_release(). Signed-off-by: Robert Richter --- drivers/cxl/core/port.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c index d10c3580719b..e21a9c3fe4da 100644 --- a/drivers/cxl/core/port.c +++ b/drivers/cxl/core/port.c @@ -1366,8 +1366,24 @@ int devm_cxl_enumerate_ports(struct cxl_memdev *cxlmd) { struct device *dev = &cxlmd->dev; struct device *iter; + struct cxl_dport *dport; + struct cxl_port *port; int rc; + /* + * Skip intermediate port enumeration in the RCH case, there + * are no ports in between a host bridge and an endpoint. Only + * initialize the EP chain. + */ + if (is_cxl_restricted(cxlmd)) { + port = cxl_mem_find_port(cxlmd, &dport); + if (!port) + return -ENXIO; + rc = cxl_add_ep(dport, &cxlmd->dev); + put_device(&port->dev); + return rc; + } + rc = devm_add_action_or_reset(&cxlmd->dev, cxl_detach_ep, cxlmd); if (rc) return rc; @@ -1381,8 +1397,6 @@ int devm_cxl_enumerate_ports(struct cxl_memdev *cxlmd) for (iter = dev; iter; iter = grandparent(iter)) { struct device *dport_dev = grandparent(iter); struct device *uport_dev; - struct cxl_dport *dport; - struct cxl_port *port; if (!dport_dev) return 0;