Message ID | 20230911114313.6144-2-Jonathan.Cameron@huawei.com |
---|---|
State | Superseded |
Headers | show |
Series | hw/cxl: Support emulating 4 HDM decoders throughout topology | expand |
On Mon, Sep 11, 2023 at 12:43:10PM +0100, Jonathan Cameron wrote: > There is no strong justification for keeping these in the header > so push them down into the associated cxl-component-utils.c file. > > Suggested-by: Philippe Mathieu-Daudé <philmd@linaro.org> > Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> > Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> > --- Reviewed-by: Fan Ni <fan.ni@samsung.com> > include/hw/cxl/cxl_component.h | 18 ++---------------- > hw/cxl/cxl-component-utils.c | 18 ++++++++++++++++++ > 2 files changed, 20 insertions(+), 16 deletions(-) > > diff --git a/include/hw/cxl/cxl_component.h b/include/hw/cxl/cxl_component.h > index 42c7e581a7..bdb3881a6b 100644 > --- a/include/hw/cxl/cxl_component.h > +++ b/include/hw/cxl/cxl_component.h > @@ -225,26 +225,12 @@ void cxl_component_create_dvsec(CXLComponentState *cxl_cstate, > enum reg_type cxl_dev_type, uint16_t length, > uint16_t type, uint8_t rev, uint8_t *body); > > -static inline int cxl_decoder_count_enc(int count) > -{ > - switch (count) { > - case 1: return 0; > - case 2: return 1; > - case 4: return 2; > - case 6: return 3; > - case 8: return 4; > - case 10: return 5; > - } > - return 0; > -} > +int cxl_decoder_count_enc(int count); > > uint8_t cxl_interleave_ways_enc(int iw, Error **errp); > uint8_t cxl_interleave_granularity_enc(uint64_t gran, Error **errp); > > -static inline hwaddr cxl_decode_ig(int ig) > -{ > - return 1ULL << (ig + 8); > -} > +hwaddr cxl_decode_ig(int ig); > > CXLComponentState *cxl_get_hb_cstate(PCIHostState *hb); > bool cxl_get_hb_passthrough(PCIHostState *hb); > diff --git a/hw/cxl/cxl-component-utils.c b/hw/cxl/cxl-component-utils.c > index 378f1082ce..ea2d4770ec 100644 > --- a/hw/cxl/cxl-component-utils.c > +++ b/hw/cxl/cxl-component-utils.c > @@ -13,6 +13,24 @@ > #include "hw/pci/pci.h" > #include "hw/cxl/cxl.h" > > +int cxl_decoder_count_enc(int count) > +{ > + switch (count) { > + case 1: return 0; > + case 2: return 1; > + case 4: return 2; > + case 6: return 3; > + case 8: return 4; > + case 10: return 5; > + } > + return 0; > +} > + > +hwaddr cxl_decode_ig(int ig) > +{ > + return 1ULL << (ig + 8); > +} > + > static uint64_t cxl_cache_mem_read_reg(void *opaque, hwaddr offset, > unsigned size) > { > -- > 2.39.2 > >
diff --git a/include/hw/cxl/cxl_component.h b/include/hw/cxl/cxl_component.h index 42c7e581a7..bdb3881a6b 100644 --- a/include/hw/cxl/cxl_component.h +++ b/include/hw/cxl/cxl_component.h @@ -225,26 +225,12 @@ void cxl_component_create_dvsec(CXLComponentState *cxl_cstate, enum reg_type cxl_dev_type, uint16_t length, uint16_t type, uint8_t rev, uint8_t *body); -static inline int cxl_decoder_count_enc(int count) -{ - switch (count) { - case 1: return 0; - case 2: return 1; - case 4: return 2; - case 6: return 3; - case 8: return 4; - case 10: return 5; - } - return 0; -} +int cxl_decoder_count_enc(int count); uint8_t cxl_interleave_ways_enc(int iw, Error **errp); uint8_t cxl_interleave_granularity_enc(uint64_t gran, Error **errp); -static inline hwaddr cxl_decode_ig(int ig) -{ - return 1ULL << (ig + 8); -} +hwaddr cxl_decode_ig(int ig); CXLComponentState *cxl_get_hb_cstate(PCIHostState *hb); bool cxl_get_hb_passthrough(PCIHostState *hb); diff --git a/hw/cxl/cxl-component-utils.c b/hw/cxl/cxl-component-utils.c index 378f1082ce..ea2d4770ec 100644 --- a/hw/cxl/cxl-component-utils.c +++ b/hw/cxl/cxl-component-utils.c @@ -13,6 +13,24 @@ #include "hw/pci/pci.h" #include "hw/cxl/cxl.h" +int cxl_decoder_count_enc(int count) +{ + switch (count) { + case 1: return 0; + case 2: return 1; + case 4: return 2; + case 6: return 3; + case 8: return 4; + case 10: return 5; + } + return 0; +} + +hwaddr cxl_decode_ig(int ig) +{ + return 1ULL << (ig + 8); +} + static uint64_t cxl_cache_mem_read_reg(void *opaque, hwaddr offset, unsigned size) {