Message ID | 20231123174355.1176-2-shiju.jose@huawei.com |
---|---|
State | Superseded |
Headers | show |
Series | cxl: Add support for CXL feature commands, CXL device patrol scrub control and DDR5 ECS control features | expand |
Hi, kernel test robot noticed the following build warnings: [auto build test WARNING on krzk-mem-ctrl/for-next] [also build test WARNING on linus/master v6.7-rc2 next-20231124] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/shiju-jose-huawei-com/cxl-mbox-Add-GET_SUPPORTED_FEATURES-mailbox-command/20231124-014622 base: https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl.git for-next patch link: https://lore.kernel.org/r/20231123174355.1176-2-shiju.jose%40huawei.com patch subject: [PATCH v3 01/11] cxl/mbox: Add GET_SUPPORTED_FEATURES mailbox command config: i386-randconfig-061-20231124 (https://download.01.org/0day-ci/archive/20231124/202311241526.R8n6AibH-lkp@intel.com/config) compiler: clang version 16.0.4 (https://github.com/llvm/llvm-project.git ae42196bc493ffe877a7e3dff8be32035dea4d07) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20231124/202311241526.R8n6AibH-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202311241526.R8n6AibH-lkp@intel.com/ sparse warnings: (new ones prefixed by >>) >> drivers/cxl/core/mbox.c:1317:30: sparse: sparse: cast from restricted __le32 vim +1317 drivers/cxl/core/mbox.c 1305 1306 int cxl_get_supported_features(struct cxl_memdev_state *mds, 1307 struct cxl_mbox_get_supp_feats_in *pi, 1308 void *feats_out) 1309 { 1310 struct cxl_mbox_cmd mbox_cmd; 1311 int rc; 1312 1313 mbox_cmd = (struct cxl_mbox_cmd) { 1314 .opcode = CXL_MBOX_OP_GET_SUPPORTED_FEATURES, 1315 .size_in = sizeof(*pi), 1316 .payload_in = pi, > 1317 .size_out = (size_t)pi->count, 1318 .payload_out = feats_out, 1319 .min_out = sizeof(struct cxl_mbox_get_supp_feats_out), 1320 }; 1321 rc = cxl_internal_send_cmd(mds, &mbox_cmd); 1322 if (rc < 0) 1323 return rc; 1324 1325 return 0; 1326 } 1327 EXPORT_SYMBOL_NS_GPL(cxl_get_supported_features, CXL); 1328
Hi, These warnings are fixed. Will add in the next version. Thanks, Shiju >-----Original Message----- >From: kernel test robot <lkp@intel.com> >Sent: 24 November 2023 13:20 >To: Shiju Jose <shiju.jose@huawei.com>; linux-cxl@vger.kernel.org; linux- >mm@kvack.org; dave@stgolabs.net; Jonathan Cameron ><jonathan.cameron@huawei.com>; dave.jiang@intel.com; >alison.schofield@intel.com; vishal.l.verma@intel.com; ira.weiny@intel.com; >dan.j.williams@intel.com >Cc: oe-kbuild-all@lists.linux.dev; linux-acpi@vger.kernel.org; linux- >kernel@vger.kernel.org; david@redhat.com; Vilas.Sridharan@amd.com; >leo.duran@amd.com; Yazen.Ghannam@amd.com; rientjes@google.com; >jiaqiyan@google.com; tony.luck@intel.com; Jon.Grimm@amd.com; >dave.hansen@linux.intel.com; rafael@kernel.org; lenb@kernel.org; >naoya.horiguchi@nec.com; james.morse@arm.com; jthoughton@google.com; >somasundaram.a@hpe.com; erdemaktas@google.com; pgonda@google.com; >duenwen@google.com; mike.malvestuto@intel.com >Subject: Re: [PATCH v3 01/11] cxl/mbox: Add GET_SUPPORTED_FEATURES >mailbox command > >Hi, > >kernel test robot noticed the following build warnings: > >[auto build test WARNING on krzk-mem-ctrl/for-next] [also build test WARNING >on linus/master v6.7-rc2 next-20231124] [If your patch is applied to the wrong >git tree, kindly drop us a note. >And when submitting patch, we suggest to use '--base' as documented in >https://git-scm.com/docs/git-format-patch#_base_tree_information] > >url: https://github.com/intel-lab-lkp/linux/commits/shiju-jose-huawei-com/cxl- >mbox-Add-GET_SUPPORTED_FEATURES-mailbox-command/20231124-014622 >base: https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl.git >for-next >patch link: https://lore.kernel.org/r/20231123174355.1176-2- >shiju.jose%40huawei.com >patch subject: [PATCH v3 01/11] cxl/mbox: Add GET_SUPPORTED_FEATURES >mailbox command >config: i386-randconfig-061-20231124 (https://download.01.org/0day- >ci/archive/20231124/202311241526.R8n6AibH-lkp@intel.com/config) >compiler: clang version 16.0.4 (https://github.com/llvm/llvm-project.git >ae42196bc493ffe877a7e3dff8be32035dea4d07) >reproduce (this is a W=1 build): (https://download.01.org/0day- >ci/archive/20231124/202311241526.R8n6AibH-lkp@intel.com/reproduce) > >If you fix the issue in a separate patch/commit (i.e. not just a new version of the >same patch/commit), kindly add following tags >| Reported-by: kernel test robot <lkp@intel.com> >| Closes: >| https://lore.kernel.org/oe-kbuild-all/202311241526.R8n6AibH-lkp@intel. >| com/ > >sparse warnings: (new ones prefixed by >>) >>> drivers/cxl/core/mbox.c:1317:30: sparse: sparse: cast from restricted >>> __le32 > >vim +1317 drivers/cxl/core/mbox.c > > 1305 > 1306 int cxl_get_supported_features(struct cxl_memdev_state *mds, > 1307 struct >cxl_mbox_get_supp_feats_in *pi, > 1308 void *feats_out) > 1309 { > 1310 struct cxl_mbox_cmd mbox_cmd; > 1311 int rc; > 1312 > 1313 mbox_cmd = (struct cxl_mbox_cmd) { > 1314 .opcode = CXL_MBOX_OP_GET_SUPPORTED_FEATURES, > 1315 .size_in = sizeof(*pi), > 1316 .payload_in = pi, >> 1317 .size_out = (size_t)pi->count, > 1318 .payload_out = feats_out, > 1319 .min_out = sizeof(struct cxl_mbox_get_supp_feats_out), > 1320 }; > 1321 rc = cxl_internal_send_cmd(mds, &mbox_cmd); > 1322 if (rc < 0) > 1323 return rc; > 1324 > 1325 return 0; > 1326 } > 1327 EXPORT_SYMBOL_NS_GPL(cxl_get_supported_features, CXL); > 1328 > >-- >0-DAY CI Kernel Test Service >https://github.com/intel/lkp-tests/wiki
diff --git a/drivers/cxl/core/mbox.c b/drivers/cxl/core/mbox.c index 36270dcfb42e..eb2741446b5f 100644 --- a/drivers/cxl/core/mbox.c +++ b/drivers/cxl/core/mbox.c @@ -1303,6 +1303,29 @@ int cxl_set_timestamp(struct cxl_memdev_state *mds) } EXPORT_SYMBOL_NS_GPL(cxl_set_timestamp, CXL); +int cxl_get_supported_features(struct cxl_memdev_state *mds, + struct cxl_mbox_get_supp_feats_in *pi, + void *feats_out) +{ + struct cxl_mbox_cmd mbox_cmd; + int rc; + + mbox_cmd = (struct cxl_mbox_cmd) { + .opcode = CXL_MBOX_OP_GET_SUPPORTED_FEATURES, + .size_in = sizeof(*pi), + .payload_in = pi, + .size_out = (size_t)pi->count, + .payload_out = feats_out, + .min_out = sizeof(struct cxl_mbox_get_supp_feats_out), + }; + rc = cxl_internal_send_cmd(mds, &mbox_cmd); + if (rc < 0) + return rc; + + return 0; +} +EXPORT_SYMBOL_NS_GPL(cxl_get_supported_features, CXL); + int cxl_mem_get_poison(struct cxl_memdev *cxlmd, u64 offset, u64 len, struct cxl_region *cxlr) { diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h index a2fcbca253f3..d831dad748f5 100644 --- a/drivers/cxl/cxlmem.h +++ b/drivers/cxl/cxlmem.h @@ -506,6 +506,7 @@ enum cxl_opcode { CXL_MBOX_OP_SET_TIMESTAMP = 0x0301, CXL_MBOX_OP_GET_SUPPORTED_LOGS = 0x0400, CXL_MBOX_OP_GET_LOG = 0x0401, + CXL_MBOX_OP_GET_SUPPORTED_FEATURES = 0x0500, CXL_MBOX_OP_IDENTIFY = 0x4000, CXL_MBOX_OP_GET_PARTITION_INFO = 0x4100, CXL_MBOX_OP_SET_PARTITION_INFO = 0x4101, @@ -740,6 +741,61 @@ struct cxl_mbox_set_timestamp_in { } __packed; +/* Get Supported Features CXL 3.0 Spec 8.2.9.6.1 */ +/* + * Get Supported Features input payload + * CXL rev 3.0 section 8.2.9.6.1; Table 8-75 + */ +struct cxl_mbox_get_supp_feats_in { + __le32 count; + __le16 start_index; + u16 reserved; +} __packed; + +/* + * Get Supported Features Supported Feature Entry + * CXL rev 3.0 section 8.2.9.6.1; Table 8-77 + */ +/* Supported Feature Entry : Payload out attribute flags */ +#define CXL_FEAT_ENTRY_FLAG_CHANGABLE BIT(0) +#define CXL_FEAT_ENTRY_FLAG_DEEPEST_RESET_PERSISTENCE_MASK GENMASK(3, 1) + +enum cxl_feat_attrib_value_persistence { + CXL_FEAT_ATTRIB_VALUE_PERSISTENCE_NONE = 0x0, + CXL_FEAT_ATTRIB_VALUE_PERSISTENCE_CXL_RESET = 0x1, + CXL_FEAT_ATTRIB_VALUE_PERSISTENCE_HOT_RESET = 0x2, + CXL_FEAT_ATTRIB_VALUE_PERSISTENCE_WARM_RESET = 0x3, + CXL_FEAT_ATTRIB_VALUE_PERSISTENCE_COLD_RESET = 0x4, + CXL_FEAT_ATTRIB_VALUE_PERSISTENCE_MAX +}; + +#define CXL_FEAT_ENTRY_FLAG_PERSISTENCE_ACROSS_FW_UPDATE_MASK BIT(4) +#define CXL_FEAT_ENTRY_FLAG_PERSISTENCE_DEFAULT_SEL_SUPPORT_MASK BIT(5) +#define CXL_FEAT_ENTRY_FLAG_PERSISTENCE_SAVED_SEL_SUPPORT_MASK BIT(6) + +struct cxl_mbox_supp_feat_entry { + uuid_t uuid; + __le16 feat_index; + __le16 get_feat_size; + __le16 set_feat_size; + __le32 attrb_flags; + u8 get_feat_version; + u8 set_feat_version; + __le16 set_feat_effects; + u8 rsvd[18]; +} __packed; + +/* + * Get Supported Features output payload + * CXL rev 3.0 section 8.2.9.6.1; Table 8-76 + */ +struct cxl_mbox_get_supp_feats_out { + __le16 entries; + __le16 nsuppfeats_dev; + u32 reserved; + struct cxl_mbox_supp_feat_entry feat_entries[]; +} __packed; + /* Get Poison List CXL 3.0 Spec 8.2.9.8.4.1 */ struct cxl_mbox_poison_in { __le64 offset; @@ -867,6 +923,9 @@ void clear_exclusive_cxl_commands(struct cxl_memdev_state *mds, unsigned long *cmds); void cxl_mem_get_event_records(struct cxl_memdev_state *mds, u32 status); int cxl_set_timestamp(struct cxl_memdev_state *mds); +int cxl_get_supported_features(struct cxl_memdev_state *mds, + struct cxl_mbox_get_supp_feats_in *pi, + void *feats_out); int cxl_poison_state_init(struct cxl_memdev_state *mds); int cxl_mem_get_poison(struct cxl_memdev *cxlmd, u64 offset, u64 len, struct cxl_region *cxlr);