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AJvYcCWu3PZZCP/9Nuhct+qvkXnG2nS600pIaMsic0J12ODzfe0K1Z1uQsPAEjIKC7etEw0v1fb1Mj+BjyJvCcS3qxFbrjFCD12Gq0eY X-Gm-Message-State: AOJu0Yy8w4SQOSBLdZsW/P8/yHWOTPT4r8MhKVTLtOnzudD3z3Zit3NB EXHwQYfU4VHPH2WX0GBq+Dl8vjfmgAWWc0QpLjf1JAMbX6YhAWD6 X-Google-Smtp-Source: AGHT+IGJaenBrz1oSac79n8j93VzbYMt0qiN1tC/RpBnCVT3yoX1a0NYTi0pRDY7jv1mKlEMaKgrEw== X-Received: by 2002:a25:2690:0:b0:dc6:ff12:13d7 with SMTP id m138-20020a252690000000b00dc6ff1213d7mr5343408ybm.60.1709581476386; Mon, 04 Mar 2024 11:44:36 -0800 (PST) Received: from localhost.localdomain ([50.205.20.42]) by smtp.gmail.com with ESMTPSA id h1-20020a255f41000000b00dc62edd58dasm2282646ybm.40.2024.03.04.11.44.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Mar 2024 11:44:36 -0800 (PST) From: nifan.cxl@gmail.com To: qemu-devel@nongnu.org Cc: jonathan.cameron@huawei.com, linux-cxl@vger.kernel.org, gregory.price@memverge.com, ira.weiny@intel.com, dan.j.williams@intel.com, a.manzanares@samsung.com, dave@stgolabs.net, nmtadam.samsung@gmail.com, nifan.cxl@gmail.com, jim.harris@samsung.com, Jorgen.Hansen@wdc.com, wj28.lee@gmail.com, Fan Ni Subject: [PATCH v5 13/13] qapi/cxl.json: Add QMP interfaces to print out accepted and pending DC extents Date: Mon, 4 Mar 2024 11:34:08 -0800 Message-ID: <20240304194331.1586191-14-nifan.cxl@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240304194331.1586191-1-nifan.cxl@gmail.com> References: <20240304194331.1586191-1-nifan.cxl@gmail.com> Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Fan Ni With the change, we add the following two QMP interfaces to print out extents information in the device, 1. cxl-display-accepted-dc-extents: print out the accepted DC extents in the device; 2. cxl-display-pending-to-add-dc-extents: print out the pending-to-add DC extents in the device; The output is appended to a file passed to the command and by default it is /tmp/dc-extent.txt. Signed-off-by: Fan Ni --- hw/mem/cxl_type3.c | 80 ++++++++++++++++++++++++++++++++++++++++ hw/mem/cxl_type3_stubs.c | 12 ++++++ qapi/cxl.json | 32 ++++++++++++++++ 3 files changed, 124 insertions(+) diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c index 5bd64e604e..6a08e7ae40 100644 --- a/hw/mem/cxl_type3.c +++ b/hw/mem/cxl_type3.c @@ -2089,6 +2089,86 @@ void qmp_cxl_release_dynamic_capacity(const char *path, uint8_t region_id, region_id, records, errp); } +static void cxl_dcd_display_extent_list(const CXLType3Dev *dcd, const char *f, + bool accepted_list, Error **errp) +{ + const CXLDCExtentList *list; + CXLDCExtent *ent; + FILE *fp = NULL; + int i = 0; + + if (!dcd->dc.num_regions) { + error_setg(errp, "No dynamic capacity support from the device"); + return; + } + + if (!f) { + fp = fopen("/tmp/dc-extent.txt", "a+"); + } else { + fp = fopen(f, "a+"); + } + + if (!fp) { + error_setg(errp, "Open log file failed"); + return; + } + if (accepted_list) { + list = &dcd->dc.extents; + fprintf(fp, "Print accepted extent info:\n"); + } else { + list = &dcd->dc.extents_pending_to_add; + fprintf(fp, "Print pending-to-add extent info:\n"); + } + + QTAILQ_FOREACH(ent, list, node) { + fprintf(fp, "%d: [0x%lx - 0x%lx]\n", i++, ent->start_dpa, + ent->start_dpa + ent->len); + } + fprintf(fp, "In total, %d extents printed!\n", i); + fclose(fp); +} + +void qmp_cxl_display_accepted_dc_extents(const char *path, const char *f, + Error **errp) +{ + Object *obj; + CXLType3Dev *dcd; + + obj = object_resolve_path(path, NULL); + if (!obj) { + error_setg(errp, "Unable to resolve path"); + return; + } + if (!object_dynamic_cast(obj, TYPE_CXL_TYPE3)) { + error_setg(errp, "Path not point to a valid CXL type3 device"); + return; + } + + dcd = CXL_TYPE3(obj); + cxl_dcd_display_extent_list(dcd, f, true, errp); +} + +void qmp_cxl_display_pending_to_add_dc_extents(const char *path, const char *f, + Error **errp) +{ + Object *obj; + CXLType3Dev *dcd; + + obj = object_resolve_path(path, NULL); + if (!obj) { + error_setg(errp, "Unable to resolve path"); + return; + } + if (!object_dynamic_cast(obj, TYPE_CXL_TYPE3)) { + error_setg(errp, "Path not point to a valid CXL type3 device"); + return; + } + + + dcd = CXL_TYPE3(obj); + cxl_dcd_display_extent_list(dcd, f, false, errp); +} + static void ct3_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); diff --git a/hw/mem/cxl_type3_stubs.c b/hw/mem/cxl_type3_stubs.c index d913b11b4d..d896758301 100644 --- a/hw/mem/cxl_type3_stubs.c +++ b/hw/mem/cxl_type3_stubs.c @@ -81,3 +81,15 @@ void qmp_cxl_release_dynamic_capacity(const char *path, uint8_t region_id, { error_setg(errp, "CXL Type 3 support is not compiled in"); } + +void qmp_cxl_display_accepted_dc_extents(const char *path, const char *f, + Error **errp) +{ + error_setg(errp, "CXL Type 3 support is not compiled in"); +} + +void qmp_cxl_display_pending_to_add_dc_extents(const char *path, const char *f, + Error **errp) +{ + error_setg(errp, "CXL Type 3 support is not compiled in"); +} diff --git a/qapi/cxl.json b/qapi/cxl.json index 2645004666..6f10300ec6 100644 --- a/qapi/cxl.json +++ b/qapi/cxl.json @@ -420,3 +420,35 @@ 'extents': [ 'CXLDCExtentRecord' ] } } + +## +# @cxl-display-accepted-dc-extents: +# +# Command to print out all the accepted DC extents in the device +# +# @path: CXL DCD canonical QOM path +# @output: path of output file to dump the results to +# +# Since : 9.0 +## +{ 'command': 'cxl-display-accepted-dc-extents', + 'data': { 'path': 'str', + 'output': 'str' + } +} + +## +# @cxl-display-pending-to-add-dc-extents: +# +# Command to print out all the pending-to-add DC extents in the device +# +# @path: CXL DCD canonical QOM path +# @output: path of output file to dump the results to +# +# Since : 9.0 +## +{ 'command': 'cxl-display-pending-to-add-dc-extents', + 'data': { 'path': 'str', + 'output': 'str' + } +}