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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BL6PEPF00022570.mail.protection.outlook.com (10.167.249.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7611.14 via Frontend Transport; Wed, 22 May 2024 15:08:52 +0000 Received: from ethanolx50f7host.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Wed, 22 May 2024 10:08:51 -0500 From: Smita Koralahalli To: , , CC: Ard Biesheuvel , Alison Schofield , Vishal Verma , "Ira Weiny" , Dan Williams , Jonathan Cameron , Yazen Ghannam , Bowman Terry Subject: [PATCH 2/4] acpi/ghes, efi/cper: Recognize and process CXL Protocol Errors. Date: Wed, 22 May 2024 15:08:37 +0000 Message-ID: <20240522150839.27578-3-Smita.KoralahalliChannabasappa@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240522150839.27578-1-Smita.KoralahalliChannabasappa@amd.com> References: <20240522150839.27578-1-Smita.KoralahalliChannabasappa@amd.com> Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00022570:EE_|MN0PR12MB6365:EE_ X-MS-Office365-Filtering-Correlation-Id: f1490577-c123-497b-ad0f-08dc7a7117d7 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|376005|82310400017|36860700004|1800799015; X-Microsoft-Antispam-Message-Info: MdKq8w/d/sw47xx+v+ZvM8LSmdkWWHHAykYiiwK52mYefJhpRQ8CWpxt3C5aHUKZYyx76n9lmAGeQVwJUXJ0RhorYWI5Vil63iPkMU2ot3lqVjZ4YSG+cuGtChoOIbNQXxWGbLlMFvvPgTFh6f35Aug/j1emZDo81AHTzFcpa450nbKvDs9pcawCk1qbX3leL4f8bWjZqThPNYmZklr8ymqFKHnR162zf8m8MXfFl6x45ifzUOk2YFqSC9FyppzSDZzh04uxSVaLgu9n2YBNo+SU5CcUigL9dvy1QQ76zPKtq18Kup/CpwrBnS3/KApDTe9AftC8VUz1AvPrctY1WF+bdd5YD8Rc9rTjRNy9XxeBVZx3FUv0kWAQl7a2Vnc49jNXDt9spczA7KVIk6ExVkziIlpipWYNPGxWE5oc1jA9RniiFxWkmvVZPLwHmF2gHtKxKckWEHEUYFEKfdjqcY430yFvfLeIHXcVfAwqM+MTBaBeV4ExWNNimt2gM9aLLfdaPRtawBC+CKZ3SSorVIbdslPHuiqgIwBP3XipBol/YRfn9MfFnrzYxh2o0h3mL1vj9S27Esaa644QnAzkt3rUdfBl0H7HqyJCvlKyWnIEYvAZSqjkN5XpTEte4QbqFT5P8vbkHDY5wG77SI9zeNp+wwU2/UsJXmT3l7YIgUJuxagJuk/ECOOZ6SlkAkyyGZfNtPr1JeD4sJd3DHl7FfXHRv7ENRhoG8oeDtA/ScCAQIf4dfRgv8UzYsPhttcDGnQQrVg58BPL9I9/QuO3MBNBxHDOVid2Gns0JE2noAOXneURm/xOds/KPeZ1WMyVxf5jFya/qzvM3XHw3EqU78sHfTGvTjjvdq+FC07gQDqrCHRHJyuET/xoo0SP1OSJ24mzEoIF6rKGYgAaecuHorVcwDPDww0K/dCibDwTts8DgqFTtYd1IThlY2L9pbubtuH+VESFpDqUYjKoU0UCiW/ixr2rMcQGSeIZGx8SirDIPqJhOvxx3COw8eWiel0DemkAPjdMaDh5fcEkCbTgxQDTIgbfuqTQG5NGspuVRmT+aVh1VS/LuAj3JSM5yGyGqi9BKLoHT3Rpvv5ZLBddOwatUuklwiC5DnHJK5ZnHbBCyuGhRgqw7eJl/RdkvRY1qP5W21QyULihaV4CK3fib9FvzBWv3KfFBb2JZVLmCOq3SWkS9UxTidv10R/+uNVa3cQtFS8mmcSzc8nN/9+OC1zE/wP4UqY1N4OfEvq4wi+Xnh1Q/GSLIZfR8lzVqwOWw5KakFA/21k6PrOqW5Y3OIJ0b3bkk3r1e9uzvyRk7XFdLsLJ5JUyKnPY+XlLYKVz18/fmfJOaaEFJCy141BNPvtmJHMbNg/AFvqG/HeDBTo+mxBlbfaq83kWC277fxOg X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(376005)(82310400017)(36860700004)(1800799015);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 May 2024 15:08:52.9202 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f1490577-c123-497b-ad0f-08dc7a7117d7 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00022570.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB6365 UEFI v2.10 section N.2.13 defines a CPER record for CXL Protocol errors. Add GHES support to detect CXL CPER Protocol Error Record and Cache Error Severity, Device ID, Device Serial number and CXL RAS capability struct in struct cxl_cper_prot_err. Include this struct as a member of struct cxl_cper_work_data. Signed-off-by: Smita Koralahalli --- drivers/acpi/apei/ghes.c | 10 +++++ drivers/firmware/efi/cper_cxl.c | 66 +++++++++++++++++++++++++++++++++ include/linux/cxl-event.h | 26 +++++++++++++ 3 files changed, 102 insertions(+) diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c index 623cc0cb4a65..1a58032770ee 100644 --- a/drivers/acpi/apei/ghes.c +++ b/drivers/acpi/apei/ghes.c @@ -717,6 +717,14 @@ static void cxl_cper_post_event(enum cxl_event_type event_type, schedule_work(cxl_cper_work); } +static void cxl_cper_handle_prot_err(struct acpi_hest_generic_data *gdata) +{ + struct cxl_cper_work_data wd; + + if (cxl_cper_handle_prot_err_info(gdata, &wd.p_err)) + return; +} + int cxl_cper_register_work(struct work_struct *work) { if (cxl_cper_work) @@ -791,6 +799,8 @@ static bool ghes_do_proc(struct ghes *ghes, struct cxl_cper_event_rec *rec = acpi_hest_get_payload(gdata); cxl_cper_post_event(CXL_CPER_EVENT_MEM_MODULE, rec); + } else if (guid_equal(sec_type, &CPER_SEC_CXL_PROT_ERR)) { + cxl_cper_handle_prot_err(gdata); } else { void *err = acpi_hest_get_payload(gdata); diff --git a/drivers/firmware/efi/cper_cxl.c b/drivers/firmware/efi/cper_cxl.c index 4fd8d783993e..03b9839f3b73 100644 --- a/drivers/firmware/efi/cper_cxl.c +++ b/drivers/firmware/efi/cper_cxl.c @@ -8,6 +8,7 @@ */ #include +#include #include "cper_cxl.h" #define PROT_ERR_VALID_AGENT_TYPE BIT_ULL(0) @@ -44,6 +45,17 @@ enum { USP, /* CXL Upstream Switch Port */ }; +static enum cxl_aer_err_type cper_severity_cxl_aer(int cper_severity) +{ + switch (cper_severity) { + case CPER_SEV_RECOVERABLE: + case CPER_SEV_FATAL: + return CXL_AER_UNCORRECTABLE; + default: + return CXL_AER_CORRECTABLE; + } +} + void cper_print_prot_err(const char *pfx, const struct cper_sec_prot_err *prot_err) { if (prot_err->valid_bits & PROT_ERR_VALID_AGENT_TYPE) @@ -176,3 +188,57 @@ void cper_print_prot_err(const char *pfx, const struct cper_sec_prot_err *prot_e sizeof(cxl_ras->header_log), 0); } } + +int cxl_cper_handle_prot_err_info(struct acpi_hest_generic_data *gdata, + struct cxl_cper_prot_err *p_err) +{ + struct cper_sec_prot_err *prot_err = acpi_hest_get_payload(gdata); + u8 *dvsec_start, *cap_start; + + if (!(prot_err->valid_bits & PROT_ERR_VALID_DEVICE_ID)) { + pr_err(FW_WARN "No Device ID\n"); + return -EINVAL; + } + + /* + * The device ID or agent address is required for CXL RCD, CXL + * SLD, CXL LD, CXL Fabric Manager Managed LD, CXL Root Port, + * CXL Downstream Switch Port and CXL Upstream Switch Port. + */ + if (prot_err->agent_type <= 0x7 && prot_err->agent_type != RCH_DP) { + p_err->segment = prot_err->agent_addr.segment; + p_err->bus = prot_err->agent_addr.bus; + p_err->device = prot_err->agent_addr.device; + p_err->function = prot_err->agent_addr.function; + } else { + pr_err(FW_WARN "Invalid agent type\n"); + return -EINVAL; + } + + if (!(prot_err->valid_bits & PROT_ERR_VALID_ERROR_LOG)) { + pr_err(FW_WARN "Invalid Protocol Error log\n"); + return -EINVAL; + } + + dvsec_start = (u8 *)(prot_err + 1); + cap_start = dvsec_start + prot_err->dvsec_len; + p_err->cxl_ras = *(struct cxl_ras_capability_regs *)cap_start; + + /* + * Set device serial number unconditionally. + * + * Print a warning message if it is not valid. The device serial + * number is required for CXL RCD, CXL SLD, CXL LD and CXL Fabric + * Manager Managed LD. + */ + if (!(prot_err->valid_bits & PROT_ERR_VALID_SERIAL_NUMBER) || + prot_err->agent_type > 0x4 || prot_err->agent_type == RCH_DP) + pr_warn(FW_WARN "No Device Serial number\n"); + + p_err->lower_dw = prot_err->dev_serial_num.lower_dw; + p_err->upper_dw = prot_err->dev_serial_num.upper_dw; + + p_err->severity = cper_severity_cxl_aer(gdata->error_severity); + + return 0; +} diff --git a/include/linux/cxl-event.h b/include/linux/cxl-event.h index f11e52ff565a..9c7b69e076a0 100644 --- a/include/linux/cxl-event.h +++ b/include/linux/cxl-event.h @@ -165,11 +165,37 @@ struct cxl_ras_capability_regs { u32 header_log[16]; }; +enum cxl_aer_err_type { + CXL_AER_UNCORRECTABLE, + CXL_AER_CORRECTABLE, +}; + +struct cxl_cper_prot_err { + struct cxl_ras_capability_regs cxl_ras; + + /* Device ID */ + u8 function; + u8 device; + u8 bus; + u16 segment; + + /* Device Serial Number */ + u32 lower_dw; + u32 upper_dw; + + int severity; +}; + struct cxl_cper_work_data { enum cxl_event_type event_type; struct cxl_cper_event_rec rec; + struct cxl_cper_prot_err p_err; }; +struct acpi_hest_generic_data; +int cxl_cper_handle_prot_err_info(struct acpi_hest_generic_data *gdata, + struct cxl_cper_prot_err *p_err); + #ifdef CONFIG_ACPI_APEI_GHES int cxl_cper_register_work(struct work_struct *work); int cxl_cper_unregister_work(struct work_struct *work);