| Message ID | 20240614032133.45365-4-yaoxt.fnst@fujitsu.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | check interleave capability | expand |
On Thu, Jun 13, 2024 at 11:21:33PM -0400, Yao Xingtao wrote: > Since the interleave capability check is supported, the cxl_test will > fail. > Support any and all possibilities for the mock cxl device (host bridge, > switch, cxl_mem .etc). This needs to be folded into Patch 1. FYI - sometimes when we add a new feature the cxl-test mock support is added as a separate patch. In this case, we're just preserving existing functionality of cxl-test. Prefer not to break it in Patch 1 and then fix it in a subsequent patch. -- Alison > > Suggested-by: Dan Williams <dan.j.williams@intel.com> > Suggested-by: Alison Schofield <alison.schofield@intel.com> > Signed-off-by: Yao Xingtao <yaoxt.fnst@fujitsu.com> > --- > tools/testing/cxl/test/cxl.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c > index 61c69297e797..fbebcda4364c 100644 > --- a/tools/testing/cxl/test/cxl.c > +++ b/tools/testing/cxl/test/cxl.c > @@ -630,11 +630,15 @@ static struct cxl_hdm *mock_cxl_setup_hdm(struct cxl_port *port, > struct cxl_endpoint_dvsec_info *info) > { > struct cxl_hdm *cxlhdm = devm_kzalloc(&port->dev, sizeof(*cxlhdm), GFP_KERNEL); > + struct device *dev = &port->dev; > > if (!cxlhdm) > return ERR_PTR(-ENOMEM); > > cxlhdm->port = port; > + cxlhdm->interleave_mask = ~0U; > + cxlhdm->iw_cap_mask = ~0UL; > + dev_set_drvdata(dev, cxlhdm); > return cxlhdm; > } > > -- > 2.37.3 > >
> -----Original Message----- > From: Alison Schofield <alison.schofield@intel.com> > Sent: Friday, June 14, 2024 12:58 PM > To: Yao, Xingtao/姚 幸涛 <yaoxt.fnst@fujitsu.com> > Cc: dave@stgolabs.net; jonathan.cameron@huawei.com; dave.jiang@intel.com; > vishal.l.verma@intel.com; ira.weiny@intel.com; dan.j.williams@intel.com; > jim.harris@samsung.com; linux-cxl@vger.kernel.org > Subject: Re: [PATCH v8 3/3] cxl_test: fix the 'create region failed' error > > On Thu, Jun 13, 2024 at 11:21:33PM -0400, Yao Xingtao wrote: > > Since the interleave capability check is supported, the cxl_test will > > fail. > > Support any and all possibilities for the mock cxl device (host bridge, > > switch, cxl_mem .etc). > > This needs to be folded into Patch 1. > > FYI - sometimes when we add a new feature the cxl-test mock support is > added as a separate patch. In this case, we're just preserving existing > functionality of cxl-test. Prefer not to break it in Patch 1 and then > fix it in a subsequent patch. OK, thanks for your advice, will fix in next revision. > > -- Alison > > > > > Suggested-by: Dan Williams <dan.j.williams@intel.com> > > Suggested-by: Alison Schofield <alison.schofield@intel.com> > > Signed-off-by: Yao Xingtao <yaoxt.fnst@fujitsu.com> > > --- > > tools/testing/cxl/test/cxl.c | 4 ++++ > > 1 file changed, 4 insertions(+) > > > > diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c > > index 61c69297e797..fbebcda4364c 100644 > > --- a/tools/testing/cxl/test/cxl.c > > +++ b/tools/testing/cxl/test/cxl.c > > @@ -630,11 +630,15 @@ static struct cxl_hdm *mock_cxl_setup_hdm(struct > cxl_port *port, > > struct cxl_endpoint_dvsec_info *info) > > { > > struct cxl_hdm *cxlhdm = devm_kzalloc(&port->dev, sizeof(*cxlhdm), > GFP_KERNEL); > > + struct device *dev = &port->dev; > > > > if (!cxlhdm) > > return ERR_PTR(-ENOMEM); > > > > cxlhdm->port = port; > > + cxlhdm->interleave_mask = ~0U; > > + cxlhdm->iw_cap_mask = ~0UL; > > + dev_set_drvdata(dev, cxlhdm); > > return cxlhdm; > > } > > > > -- > > 2.37.3 > > > >
diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c index 61c69297e797..fbebcda4364c 100644 --- a/tools/testing/cxl/test/cxl.c +++ b/tools/testing/cxl/test/cxl.c @@ -630,11 +630,15 @@ static struct cxl_hdm *mock_cxl_setup_hdm(struct cxl_port *port, struct cxl_endpoint_dvsec_info *info) { struct cxl_hdm *cxlhdm = devm_kzalloc(&port->dev, sizeof(*cxlhdm), GFP_KERNEL); + struct device *dev = &port->dev; if (!cxlhdm) return ERR_PTR(-ENOMEM); cxlhdm->port = port; + cxlhdm->interleave_mask = ~0U; + cxlhdm->iw_cap_mask = ~0UL; + dev_set_drvdata(dev, cxlhdm); return cxlhdm; }
Since the interleave capability check is supported, the cxl_test will fail. Support any and all possibilities for the mock cxl device (host bridge, switch, cxl_mem .etc). Suggested-by: Dan Williams <dan.j.williams@intel.com> Suggested-by: Alison Schofield <alison.schofield@intel.com> Signed-off-by: Yao Xingtao <yaoxt.fnst@fujitsu.com> --- tools/testing/cxl/test/cxl.c | 4 ++++ 1 file changed, 4 insertions(+)