| Message ID | 20250218132356.1809075-13-rrichter@amd.com |
|---|---|
| State | New |
| Headers | show |
| Series | cxl: Address translation support, part 2: Generic support and AMD Zen5 platform enablement | expand |
On Tue, Feb 18, 2025 at 02:23:53PM +0100, Robert Richter wrote: > There is only support to translate from the endpoint to its parent > port, but not in the opposite direction from the parent to the > endpoint. Thus, the endpoint address range cannot be determined and > setup manually. If the parent implements the ->to_hpa() callback and > needs address translation, forbid reprogramming of the decoders and > lock them. > Re-reading this explanation, it reads oddly. I think what you are trying to say is: On platforms where endpoint decoders require HPA-to-SPA translation, decoders cannot be reprogrammed due to opaque translation done by the platform's memory controllers. When address range is modified (translated) lock the decoder to prevent reprogramming. Is this accurate? > Signed-off-by: Robert Richter <rrichter@amd.com> > --- > drivers/cxl/core/region.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c > index 2ca24565757a..dab059ee26ef 100644 > --- a/drivers/cxl/core/region.c > +++ b/drivers/cxl/core/region.c > @@ -3410,6 +3410,17 @@ static int cxl_endpoint_decoder_initialize(struct cxl_endpoint_decoder *cxled) > if (rc < 0) > return rc; > > + /* > + * There is only support to translate from the endpoint to its > + * parent port, but not in the opposite direction from the > + * parent to the endpoint. Thus, the endpoint address range > + * cannot be determined and setup manually. If the address range > + * was translated and modified, forbid reprogramming of the > + * decoders and lock them. > + */ > + if (rc) > + cxld->flags |= CXL_DECODER_F_LOCK; > + > /* Convert interleave settings to next port upstream. */ > rc = cxl_port_calc_interleave(iter, &ctx); > if (rc < 0) > -- > 2.39.5 >
diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index 2ca24565757a..dab059ee26ef 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -3410,6 +3410,17 @@ static int cxl_endpoint_decoder_initialize(struct cxl_endpoint_decoder *cxled) if (rc < 0) return rc; + /* + * There is only support to translate from the endpoint to its + * parent port, but not in the opposite direction from the + * parent to the endpoint. Thus, the endpoint address range + * cannot be determined and setup manually. If the address range + * was translated and modified, forbid reprogramming of the + * decoders and lock them. + */ + if (rc) + cxld->flags |= CXL_DECODER_F_LOCK; + /* Convert interleave settings to next port upstream. */ rc = cxl_port_calc_interleave(iter, &ctx); if (rc < 0)
There is only support to translate from the endpoint to its parent port, but not in the opposite direction from the parent to the endpoint. Thus, the endpoint address range cannot be determined and setup manually. If the parent implements the ->to_hpa() callback and needs address translation, forbid reprogramming of the decoders and lock them. Signed-off-by: Robert Richter <rrichter@amd.com> --- drivers/cxl/core/region.c | 11 +++++++++++ 1 file changed, 11 insertions(+)