Message ID | 20250220013604.263489-2-dave@stgolabs.net |
---|---|
State | Superseded |
Headers | show |
Series | cxl: Dirty shutdown followups | expand |
On 2/19/25 6:36 PM, Davidlohr Bueso wrote: > Add a helper to fetch the port/device GPF dvsecs. This is > currently only used for ports, but a later patch to export > dirty count to users will make use of the device one. > > Reviewed-by: Li Ming <ming.li@zohomail.com> > Signed-off-by: Davidlohr Bueso <dave@stgolabs.net> Reviewed-by: Dave Jiang <dave.jiang@intel.com> > --- > drivers/cxl/core/pci.c | 30 ++++++++++++++++++++---------- > drivers/cxl/cxl.h | 2 ++ > 2 files changed, 22 insertions(+), 10 deletions(-) > > diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c > index a5c65f79db18..96fecb799cbc 100644 > --- a/drivers/cxl/core/pci.c > +++ b/drivers/cxl/core/pci.c > @@ -1072,6 +1072,22 @@ int cxl_pci_get_bandwidth(struct pci_dev *pdev, struct access_coordinate *c) > #define GPF_TIMEOUT_BASE_MAX 2 > #define GPF_TIMEOUT_SCALE_MAX 7 /* 10 seconds */ > > +u16 cxl_gpf_get_dvsec(struct device *dev, bool is_port) > +{ > + u16 dvsec; > + > + if (!dev_is_pci(dev)) > + return 0; > + > + dvsec = pci_find_dvsec_capability(to_pci_dev(dev), PCI_VENDOR_ID_CXL, > + is_port ? CXL_DVSEC_PORT_GPF : CXL_DVSEC_DEVICE_GPF); > + if (!dvsec) > + dev_warn(dev, "%s GPF DVSEC not present\n", > + is_port ? "Port" : "Device"); > + return dvsec; > +} > +EXPORT_SYMBOL_NS_GPL(cxl_gpf_get_dvsec, "CXL"); > + > static int update_gpf_port_dvsec(struct pci_dev *pdev, int dvsec, int phase) > { > u64 base, scale; > @@ -1116,26 +1132,20 @@ int cxl_gpf_port_setup(struct device *dport_dev, struct cxl_port *port) > { > struct pci_dev *pdev; > > - if (!dev_is_pci(dport_dev)) > - return 0; > - > - pdev = to_pci_dev(dport_dev); > - if (!pdev || !port) > + if (!port) > return -EINVAL; > > if (!port->gpf_dvsec) { > int dvsec; > > - dvsec = pci_find_dvsec_capability(pdev, PCI_VENDOR_ID_CXL, > - CXL_DVSEC_PORT_GPF); > - if (!dvsec) { > - pci_warn(pdev, "Port GPF DVSEC not present\n"); > + dvsec = cxl_gpf_get_dvsec(dport_dev, true); > + if (!dvsec) > return -EINVAL; > - } > > port->gpf_dvsec = dvsec; > } > > + pdev = to_pci_dev(dport_dev); > update_gpf_port_dvsec(pdev, port->gpf_dvsec, 1); > update_gpf_port_dvsec(pdev, port->gpf_dvsec, 2); > > diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h > index 6baec4ba9141..29f2ab0d5bf6 100644 > --- a/drivers/cxl/cxl.h > +++ b/drivers/cxl/cxl.h > @@ -901,4 +901,6 @@ bool cxl_endpoint_decoder_reset_detected(struct cxl_port *port); > #define __mock static > #endif > > +u16 cxl_gpf_get_dvsec(struct device *dev, bool is_port); > + > #endif /* __CXL_H__ */
Davidlohr Bueso wrote: > Add a helper to fetch the port/device GPF dvsecs. This is > currently only used for ports, but a later patch to export > dirty count to users will make use of the device one. > > Reviewed-by: Li Ming <ming.li@zohomail.com> > Signed-off-by: Davidlohr Bueso <dave@stgolabs.net> Reviewed-by: Ira Weiny <ira.weiny@intel.com> [snip]
On Wed, 19 Feb 2025 17:36:01 -0800 Davidlohr Bueso <dave@stgolabs.net> wrote: > Add a helper to fetch the port/device GPF dvsecs. This is > currently only used for ports, but a later patch to export > dirty count to users will make use of the device one. > > Reviewed-by: Li Ming <ming.li@zohomail.com> > Signed-off-by: Davidlohr Bueso <dave@stgolabs.net> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Maybe an enum for the port vs device thing would have been nice but I'm not that bothered and a single use enum is bit nasty.
On Wed, Feb 19, 2025 at 05:36:01PM -0800, Davidlohr Bueso wrote: > Add a helper to fetch the port/device GPF dvsecs. This is > currently only used for ports, but a later patch to export > dirty count to users will make use of the device one. > > Reviewed-by: Li Ming <ming.li@zohomail.com> > Signed-off-by: Davidlohr Bueso <dave@stgolabs.net> > --- Reviewed-by: Fan Ni <fan.ni@samsung.com> > drivers/cxl/core/pci.c | 30 ++++++++++++++++++++---------- > drivers/cxl/cxl.h | 2 ++ > 2 files changed, 22 insertions(+), 10 deletions(-) > > diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c > index a5c65f79db18..96fecb799cbc 100644 > --- a/drivers/cxl/core/pci.c > +++ b/drivers/cxl/core/pci.c > @@ -1072,6 +1072,22 @@ int cxl_pci_get_bandwidth(struct pci_dev *pdev, struct access_coordinate *c) > #define GPF_TIMEOUT_BASE_MAX 2 > #define GPF_TIMEOUT_SCALE_MAX 7 /* 10 seconds */ > > +u16 cxl_gpf_get_dvsec(struct device *dev, bool is_port) > +{ > + u16 dvsec; > + > + if (!dev_is_pci(dev)) > + return 0; > + > + dvsec = pci_find_dvsec_capability(to_pci_dev(dev), PCI_VENDOR_ID_CXL, > + is_port ? CXL_DVSEC_PORT_GPF : CXL_DVSEC_DEVICE_GPF); > + if (!dvsec) > + dev_warn(dev, "%s GPF DVSEC not present\n", > + is_port ? "Port" : "Device"); > + return dvsec; > +} > +EXPORT_SYMBOL_NS_GPL(cxl_gpf_get_dvsec, "CXL"); > + > static int update_gpf_port_dvsec(struct pci_dev *pdev, int dvsec, int phase) > { > u64 base, scale; > @@ -1116,26 +1132,20 @@ int cxl_gpf_port_setup(struct device *dport_dev, struct cxl_port *port) > { > struct pci_dev *pdev; > > - if (!dev_is_pci(dport_dev)) > - return 0; > - > - pdev = to_pci_dev(dport_dev); > - if (!pdev || !port) > + if (!port) > return -EINVAL; > > if (!port->gpf_dvsec) { > int dvsec; > > - dvsec = pci_find_dvsec_capability(pdev, PCI_VENDOR_ID_CXL, > - CXL_DVSEC_PORT_GPF); > - if (!dvsec) { > - pci_warn(pdev, "Port GPF DVSEC not present\n"); > + dvsec = cxl_gpf_get_dvsec(dport_dev, true); > + if (!dvsec) > return -EINVAL; > - } > > port->gpf_dvsec = dvsec; > } > > + pdev = to_pci_dev(dport_dev); > update_gpf_port_dvsec(pdev, port->gpf_dvsec, 1); > update_gpf_port_dvsec(pdev, port->gpf_dvsec, 2); > > diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h > index 6baec4ba9141..29f2ab0d5bf6 100644 > --- a/drivers/cxl/cxl.h > +++ b/drivers/cxl/cxl.h > @@ -901,4 +901,6 @@ bool cxl_endpoint_decoder_reset_detected(struct cxl_port *port); > #define __mock static > #endif > > +u16 cxl_gpf_get_dvsec(struct device *dev, bool is_port); > + > #endif /* __CXL_H__ */ > -- > 2.39.5 >
diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c index a5c65f79db18..96fecb799cbc 100644 --- a/drivers/cxl/core/pci.c +++ b/drivers/cxl/core/pci.c @@ -1072,6 +1072,22 @@ int cxl_pci_get_bandwidth(struct pci_dev *pdev, struct access_coordinate *c) #define GPF_TIMEOUT_BASE_MAX 2 #define GPF_TIMEOUT_SCALE_MAX 7 /* 10 seconds */ +u16 cxl_gpf_get_dvsec(struct device *dev, bool is_port) +{ + u16 dvsec; + + if (!dev_is_pci(dev)) + return 0; + + dvsec = pci_find_dvsec_capability(to_pci_dev(dev), PCI_VENDOR_ID_CXL, + is_port ? CXL_DVSEC_PORT_GPF : CXL_DVSEC_DEVICE_GPF); + if (!dvsec) + dev_warn(dev, "%s GPF DVSEC not present\n", + is_port ? "Port" : "Device"); + return dvsec; +} +EXPORT_SYMBOL_NS_GPL(cxl_gpf_get_dvsec, "CXL"); + static int update_gpf_port_dvsec(struct pci_dev *pdev, int dvsec, int phase) { u64 base, scale; @@ -1116,26 +1132,20 @@ int cxl_gpf_port_setup(struct device *dport_dev, struct cxl_port *port) { struct pci_dev *pdev; - if (!dev_is_pci(dport_dev)) - return 0; - - pdev = to_pci_dev(dport_dev); - if (!pdev || !port) + if (!port) return -EINVAL; if (!port->gpf_dvsec) { int dvsec; - dvsec = pci_find_dvsec_capability(pdev, PCI_VENDOR_ID_CXL, - CXL_DVSEC_PORT_GPF); - if (!dvsec) { - pci_warn(pdev, "Port GPF DVSEC not present\n"); + dvsec = cxl_gpf_get_dvsec(dport_dev, true); + if (!dvsec) return -EINVAL; - } port->gpf_dvsec = dvsec; } + pdev = to_pci_dev(dport_dev); update_gpf_port_dvsec(pdev, port->gpf_dvsec, 1); update_gpf_port_dvsec(pdev, port->gpf_dvsec, 2); diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index 6baec4ba9141..29f2ab0d5bf6 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -901,4 +901,6 @@ bool cxl_endpoint_decoder_reset_detected(struct cxl_port *port); #define __mock static #endif +u16 cxl_gpf_get_dvsec(struct device *dev, bool is_port); + #endif /* __CXL_H__ */