| Message ID | 20250228194402.3745766-1-dave.jiang@intel.com |
|---|---|
| State | New |
| Headers | show |
| Series | cxl: Fix warning from emitting resoruce_size_t as long long int on 32bit systems | expand |
On Fri, Feb 28, 2025 at 12:44:02PM -0700, Dave Jiang wrote: > Reported by kernel test bot from an ARM build: > drivers/cxl/core/region.c:3263:26: warning: format '%lld' expects argument of type 'long long int', but argument 3 has type 'resource_size_t' {aka 'unsigned int'} [-Wformat=] > > On a 32bit system, resoruce_size_t is defined as 32bit long vs on a 64bit 'resource' here and in commit msg. > system it is defined as 64bit long. Define the variables as u64 instead to > make the size same across all archs. > > Reported-by: kernel test robot <lkp@intel.com> > Closes: https://lore.kernel.org/oe-kbuild-all/202503010252.mIDhZ5kY-lkp@intel.com/ > Fixes: 0ec9849b6333 ("acpi/hmat / cxl: Add extended linear cache support for CXL") > Signed-off-by: Dave Jiang <dave.jiang@intel.com> > --- > drivers/cxl/core/region.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c > index a83301f24fa2..958c15842b1e 100644 > --- a/drivers/cxl/core/region.c > +++ b/drivers/cxl/core/region.c > @@ -3235,14 +3235,15 @@ static int cxl_extended_linear_cache_resize(struct cxl_region *cxlr, > struct cxl_root_decoder *cxlrd = to_cxl_root_decoder(cxlr->dev.parent); > struct cxl_region_params *p = &cxlr->params; > int nid = phys_to_target_node(res->start); > - resource_size_t size, cache_size, start; > + u64 size, cache_size, start; > int rc; > > size = resource_size(res); > if (!size) > return -EINVAL; > > - rc = cxl_acpi_get_extended_linear_cache_size(res, nid, &cache_size); > + rc = cxl_acpi_get_extended_linear_cache_size(res, nid, > + (resource_size_t *)&cache_size); > if (rc) > return rc; Ah...I was thinking this fixup would be either a %pa format or (u64)cast on cache_size in the dev_warns, but this works too. Do we also need to do this to avoid a complaint assigning to cxl_region_params: - p->cache_size = cache_size; + p->cache_size = (resource_size_t)cache_size; > > -- > 2.48.1 > >
On 2/28/25 1:31 PM, Alison Schofield wrote: > On Fri, Feb 28, 2025 at 12:44:02PM -0700, Dave Jiang wrote: >> Reported by kernel test bot from an ARM build: >> drivers/cxl/core/region.c:3263:26: warning: format '%lld' expects argument of type 'long long int', but argument 3 has type 'resource_size_t' {aka 'unsigned int'} [-Wformat=] >> >> On a 32bit system, resoruce_size_t is defined as 32bit long vs on a 64bit > > 'resource' here and in commit msg. > >> system it is defined as 64bit long. Define the variables as u64 instead to >> make the size same across all archs. >> >> Reported-by: kernel test robot <lkp@intel.com> >> Closes: https://lore.kernel.org/oe-kbuild-all/202503010252.mIDhZ5kY-lkp@intel.com/ >> Fixes: 0ec9849b6333 ("acpi/hmat / cxl: Add extended linear cache support for CXL") >> Signed-off-by: Dave Jiang <dave.jiang@intel.com> >> --- >> drivers/cxl/core/region.c | 5 +++-- >> 1 file changed, 3 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c >> index a83301f24fa2..958c15842b1e 100644 >> --- a/drivers/cxl/core/region.c >> +++ b/drivers/cxl/core/region.c >> @@ -3235,14 +3235,15 @@ static int cxl_extended_linear_cache_resize(struct cxl_region *cxlr, >> struct cxl_root_decoder *cxlrd = to_cxl_root_decoder(cxlr->dev.parent); >> struct cxl_region_params *p = &cxlr->params; >> int nid = phys_to_target_node(res->start); >> - resource_size_t size, cache_size, start; >> + u64 size, cache_size, start; >> int rc; >> >> size = resource_size(res); >> if (!size) >> return -EINVAL; >> >> - rc = cxl_acpi_get_extended_linear_cache_size(res, nid, &cache_size); >> + rc = cxl_acpi_get_extended_linear_cache_size(res, nid, >> + (resource_size_t *)&cache_size); >> if (rc) >> return rc; > > Ah...I was thinking this fixup would be either a %pa format or (u64)cast on > cache_size in the dev_warns, but this works too. > > Do we also need to do this to avoid a complaint assigning to cxl_region_params: > - p->cache_size = cache_size; > + p->cache_size = (resource_size_t)cache_size; Sure I can add that. > > >> >> -- >> 2.48.1 >> >>
diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index a83301f24fa2..958c15842b1e 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -3235,14 +3235,15 @@ static int cxl_extended_linear_cache_resize(struct cxl_region *cxlr, struct cxl_root_decoder *cxlrd = to_cxl_root_decoder(cxlr->dev.parent); struct cxl_region_params *p = &cxlr->params; int nid = phys_to_target_node(res->start); - resource_size_t size, cache_size, start; + u64 size, cache_size, start; int rc; size = resource_size(res); if (!size) return -EINVAL; - rc = cxl_acpi_get_extended_linear_cache_size(res, nid, &cache_size); + rc = cxl_acpi_get_extended_linear_cache_size(res, nid, + (resource_size_t *)&cache_size); if (rc) return rc;
Reported by kernel test bot from an ARM build: drivers/cxl/core/region.c:3263:26: warning: format '%lld' expects argument of type 'long long int', but argument 3 has type 'resource_size_t' {aka 'unsigned int'} [-Wformat=] On a 32bit system, resoruce_size_t is defined as 32bit long vs on a 64bit system it is defined as 64bit long. Define the variables as u64 instead to make the size same across all archs. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202503010252.mIDhZ5kY-lkp@intel.com/ Fixes: 0ec9849b6333 ("acpi/hmat / cxl: Add extended linear cache support for CXL") Signed-off-by: Dave Jiang <dave.jiang@intel.com> --- drivers/cxl/core/region.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)