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Mon, 31 Mar 2025 09:46:45 -0500 From: To: , , , , , , , , CC: Alejandro Lucero , Edward Cree Subject: [PATCH v12 23/23] sfc: support pio mapping based on cxl Date: Mon, 31 Mar 2025 15:45:55 +0100 Message-ID: <20250331144555.1947819-24-alejandro.lucero-palau@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250331144555.1947819-1-alejandro.lucero-palau@amd.com> References: <20250331144555.1947819-1-alejandro.lucero-palau@amd.com> Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF000015C9:EE_|LV2PR12MB6016:EE_ X-MS-Office365-Filtering-Correlation-Id: e6dd7fcf-b4e1-4380-e6a3-08dd7062ddd9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|34020700016|1800799024|36860700013|82310400026|376014|12100799063; X-Microsoft-Antispam-Message-Info: WqBaFWVCT+2hJdeC4dMtGNEpQpSCzRNvqv2W/YhYXSo276llUl7zL7H3MmL77pjCLLvOq+2Hea8AdxVqp1BYIXnsV6ycaCoFQTrfRj9nxsFXjufHt/9g5B1iBYyYfWVWw9ofk4qaJc7L6LgcMM8izPOydOhH/H9epkiIezgwjDJC3YT5JP6BKAHsBCQ6cXij8k42VQn4bNvQo2Bt7vkcEGf349JywIOSJdN0kNNJkfNkaLk+p7ooqeQU2O+rODo6iXWDomx3oU+D/mlJBSNYclxMN1D4F7pBYo4p69DsKSz7AKJ0JubZz6OO3tSukDZExZbZBa89bN0FmmJKAy8YRR8I3oaEBTjZdAVboRsMo3F88/pNdydar/g76PKwnlM16ww6xdpLitHrNjWekqxsA0Iusw8d/qjj1s/G0cY9vHW6ppiM0c+ZCM8G9gnBr1ExZtd2y/+mAloPwxckE5WJtFSecnOwQXjBunxoMmQyCcRITtfLcXAkoUUin/9vB9Aue+vAam3j79wbNwKRRjE7BqW6xovWieL8A/i2YaSNQpV/YWEE//4GLeIJPzUTYQ8rYt/iTf7enlVmUZ3/Xwy2GTyJrQoc6QSxLl736l7Oy7FsnwXGN78faXyZrJbxMPZzdcHmEbHmG7SDYT6kNepohRrVOjVz0oq6R+UYZEoQ1ehVoCDMiJf10XS5tBzGFk/xQ53hJqZxCrFzijDmCrFwCQyWgyl7ASnrVJGXTN4QdzoNe58f/6PqY00oiJV2MMehosYxshKpQS4JyLaT93gb9niH+jS0PPtc2nsmOzcvVa3TG0P9mIs2dH9r5Ltb4dVcQ4mMCYAeXyZJ+RDlrAG82w3mi6Ocf/9Gc3e03g7NAmUJ8rB1KG249tocHoLyDcYHlgcVMY/PGXSjR9wGKdFi2Y+el0cN1MJdMgFx026H7G11//oBb1jbK4zl9JChv3fdypZJbBJunHr9Qhwim44om21Gb+jOyEsK6g+/e7zXhqmzvLAgmEnlkJQSlGaYxaZ2fPm+AGMJtqqHsQX28o39oPJBJQZBmvwZ8ssQBqBK8hlThTyuLFVwUK/6uy9krGuWZJtni6Bqe2w9nr2zRs159VnneEEYi4qRsyop7pUL19o4y5T+kbpqas1zYcPzSEkPCayWms66N1fABFk/criF1FWKDLF0OuNIW3sf5RnG3TgLMwdPh4wumxPBQAU1IxRQRME7ORG2TipGeIFKve8C0JuZVi5d5ttje9xCherc4g3dOCTSwBx6y0m9febzPIjCxCX1KJGlE7lfcdhmGlB3FyjZq129WvV93StlI9dGBXmcEtJuaAmh/Qnnvi2t9rhZtyeBfm78PPvpD7jK7kOIWu0bhet1czATloGwy/TiLmX+Ztm9wdCzMMg4J8KVKFLh1nE1cTm2G8GhLRMBdKuxpKRsB5mC5vRbL0T6BB8TJYAd1N/6kPYL3VMRvWw3PRA2EEPRF5qfI/jYrxmgn5gCmIqnHw7RNDi/bxQFs45M4Ek= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(34020700016)(1800799024)(36860700013)(82310400026)(376014)(12100799063);DIR:OUT;SFP:1501; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Mar 2025 14:46:48.7004 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e6dd7fcf-b4e1-4380-e6a3-08dd7062ddd9 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015C9.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV2PR12MB6016 From: Alejandro Lucero With a device supporting CXL and successfully initialised, use the cxl region to map the memory range and use this mapping for PIO buffers. Signed-off-by: Alejandro Lucero Acked-by: Edward Cree --- drivers/net/ethernet/sfc/ef10.c | 50 +++++++++++++++++++++++---- drivers/net/ethernet/sfc/efx_cxl.c | 18 ++++++++++ drivers/net/ethernet/sfc/net_driver.h | 2 ++ drivers/net/ethernet/sfc/nic.h | 3 ++ 4 files changed, 66 insertions(+), 7 deletions(-) diff --git a/drivers/net/ethernet/sfc/ef10.c b/drivers/net/ethernet/sfc/ef10.c index 452009ed7a43..ce323af3586e 100644 --- a/drivers/net/ethernet/sfc/ef10.c +++ b/drivers/net/ethernet/sfc/ef10.c @@ -24,6 +24,7 @@ #include #include #include +#include "efx_cxl.h" /* Hardware control for EF10 architecture including 'Huntington'. */ @@ -106,7 +107,7 @@ static int efx_ef10_get_vf_index(struct efx_nic *efx) static int efx_ef10_init_datapath_caps(struct efx_nic *efx) { - MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_CAPABILITIES_V4_OUT_LEN); + MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_CAPABILITIES_V7_OUT_LEN); struct efx_ef10_nic_data *nic_data = efx->nic_data; size_t outlen; int rc; @@ -177,6 +178,12 @@ static int efx_ef10_init_datapath_caps(struct efx_nic *efx) efx->num_mac_stats); } + if (outlen < MC_CMD_GET_CAPABILITIES_V7_OUT_LEN) + nic_data->datapath_caps3 = 0; + else + nic_data->datapath_caps3 = MCDI_DWORD(outbuf, + GET_CAPABILITIES_V7_OUT_FLAGS3); + return 0; } @@ -919,6 +926,9 @@ static void efx_ef10_forget_old_piobufs(struct efx_nic *efx) static void efx_ef10_remove(struct efx_nic *efx) { struct efx_ef10_nic_data *nic_data = efx->nic_data; +#ifdef CONFIG_SFC_CXL + struct efx_probe_data *probe_data; +#endif int rc; #ifdef CONFIG_SFC_SRIOV @@ -949,7 +959,12 @@ static void efx_ef10_remove(struct efx_nic *efx) efx_mcdi_rx_free_indir_table(efx); +#ifdef CONFIG_SFC_CXL + probe_data = container_of(efx, struct efx_probe_data, efx); + if (nic_data->wc_membase && !probe_data->cxl_pio_in_use) +#else if (nic_data->wc_membase) +#endif iounmap(nic_data->wc_membase); rc = efx_mcdi_free_vis(efx); @@ -1140,6 +1155,9 @@ static int efx_ef10_dimension_resources(struct efx_nic *efx) unsigned int channel_vis, pio_write_vi_base, max_vis; struct efx_ef10_nic_data *nic_data = efx->nic_data; unsigned int uc_mem_map_size, wc_mem_map_size; +#ifdef CONFIG_SFC_CXL + struct efx_probe_data *probe_data; +#endif void __iomem *membase; int rc; @@ -1263,8 +1281,25 @@ static int efx_ef10_dimension_resources(struct efx_nic *efx) iounmap(efx->membase); efx->membase = membase; - /* Set up the WC mapping if needed */ - if (wc_mem_map_size) { + if (!wc_mem_map_size) + goto skip_pio; + + /* Set up the WC mapping */ + +#ifdef CONFIG_SFC_CXL + probe_data = container_of(efx, struct efx_probe_data, efx); + if ((nic_data->datapath_caps3 & + (1 << MC_CMD_GET_CAPABILITIES_V7_OUT_CXL_CONFIG_ENABLE_LBN)) && + probe_data->cxl_pio_initialised) { + /* Using PIO through CXL mapping? */ + nic_data->pio_write_base = probe_data->cxl->ctpio_cxl + + (pio_write_vi_base * efx->vi_stride + + ER_DZ_TX_PIOBUF - uc_mem_map_size); + probe_data->cxl_pio_in_use = true; + } else +#endif + { + /* Using legacy PIO BAR mapping */ nic_data->wc_membase = ioremap_wc(efx->membase_phys + uc_mem_map_size, wc_mem_map_size); @@ -1279,12 +1314,13 @@ static int efx_ef10_dimension_resources(struct efx_nic *efx) nic_data->wc_membase + (pio_write_vi_base * efx->vi_stride + ER_DZ_TX_PIOBUF - uc_mem_map_size); - - rc = efx_ef10_link_piobufs(efx); - if (rc) - efx_ef10_free_piobufs(efx); } + rc = efx_ef10_link_piobufs(efx); + if (rc) + efx_ef10_free_piobufs(efx); + +skip_pio: netif_dbg(efx, probe, efx->net_dev, "memory BAR at %pa (virtual %p+%x UC, %p+%x WC)\n", &efx->membase_phys, efx->membase, uc_mem_map_size, diff --git a/drivers/net/ethernet/sfc/efx_cxl.c b/drivers/net/ethernet/sfc/efx_cxl.c index 424efc61cc84..04176a33831b 100644 --- a/drivers/net/ethernet/sfc/efx_cxl.c +++ b/drivers/net/ethernet/sfc/efx_cxl.c @@ -26,6 +26,7 @@ int efx_cxl_init(struct efx_probe_data *probe_data) DECLARE_BITMAP(found, CXL_MAX_CAPS); resource_size_t max_size; struct efx_cxl *cxl; + struct range range; u16 dvsec; int rc; @@ -121,10 +122,26 @@ int efx_cxl_init(struct efx_probe_data *probe_data) goto err_region; } + rc = cxl_get_region_range(cxl->efx_region, &range); + if (rc) { + pci_err(pci_dev, "CXL getting regions params failed"); + goto err_region_params; + } + + cxl->ctpio_cxl = ioremap(range.start, range.end - range.start + 1); + if (!cxl->ctpio_cxl) { + pci_err(pci_dev, "CXL ioremap region (%pra) pfailed", &range); + rc = -ENOMEM; + goto err_region_params; + } + probe_data->cxl = cxl; + probe_data->cxl_pio_initialised = true; return 0; +err_region_params: + cxl_accel_region_detach(cxl->cxled); err_region: cxl_dpa_free(probe_data->cxl->cxled); sfc_put_decoder: @@ -135,6 +152,7 @@ int efx_cxl_init(struct efx_probe_data *probe_data) void efx_cxl_exit(struct efx_probe_data *probe_data) { if (probe_data->cxl) { + iounmap(probe_data->cxl->ctpio_cxl); cxl_accel_region_detach(probe_data->cxl->cxled); cxl_dpa_free(probe_data->cxl->cxled); cxl_put_root_decoder(probe_data->cxl->cxlrd); diff --git a/drivers/net/ethernet/sfc/net_driver.h b/drivers/net/ethernet/sfc/net_driver.h index a2626bcd6a41..86cf49a922cb 100644 --- a/drivers/net/ethernet/sfc/net_driver.h +++ b/drivers/net/ethernet/sfc/net_driver.h @@ -1211,6 +1211,7 @@ struct efx_cxl; * @efx: Efx NIC details * @cxl: details of related cxl objects * @cxl_pio_initialised: cxl initialization outcome. + * @cxl_pio_in_use: PIO using CXL mapping */ struct efx_probe_data { struct pci_dev *pci_dev; @@ -1218,6 +1219,7 @@ struct efx_probe_data { #ifdef CONFIG_SFC_CXL struct efx_cxl *cxl; bool cxl_pio_initialised; + bool cxl_pio_in_use; #endif }; diff --git a/drivers/net/ethernet/sfc/nic.h b/drivers/net/ethernet/sfc/nic.h index 9fa5c4c713ab..c87cc9214690 100644 --- a/drivers/net/ethernet/sfc/nic.h +++ b/drivers/net/ethernet/sfc/nic.h @@ -152,6 +152,8 @@ enum { * %MC_CMD_GET_CAPABILITIES response) * @datapath_caps2: Further Capabilities of datapath firmware (FLAGS2 field of * %MC_CMD_GET_CAPABILITIES response) + * @datapath_caps3: Further Capabilities of datapath firmware (FLAGS3 field of + * %MC_CMD_GET_CAPABILITIES response) * @rx_dpcpu_fw_id: Firmware ID of the RxDPCPU * @tx_dpcpu_fw_id: Firmware ID of the TxDPCPU * @must_probe_vswitching: Flag: vswitching has yet to be setup after MC reboot @@ -186,6 +188,7 @@ struct efx_ef10_nic_data { bool must_check_datapath_caps; u32 datapath_caps; u32 datapath_caps2; + u32 datapath_caps3; unsigned int rx_dpcpu_fw_id; unsigned int tx_dpcpu_fw_id; bool must_probe_vswitching;