| Message ID | 380871e1-e048-459a-adc5-cfbb6e5d5b94@stanley.mountain |
|---|---|
| State | New |
| Headers | show |
| Series | [stable,6.1.y] cxl/pci: fix error code in __cxl_hdm_decode_init() | expand |
Dan Carpenter wrote: > When commit 0cab68720598 ("cxl/pci: Fix disabling memory if DVSEC CXL > Range does not match a CFMWS window") was backported, this chunk moved > from the cxl_hdm_decode_init() function which returns negative error > codes to the __cxl_hdm_decode_init() function which returns false on > error. So the error code needs to be modified from -ENXIO to false. > > This issue only exits in the 6.1.y kernels. In later kernels negative > error codes are correct and the driver didn't exist in earlier kernels. > > Fixes: 031217128990 ("cxl/pci: Fix disabling memory if DVSEC CXL Range does not match a CFMWS window") > Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Ira Weiny <ira.weiny@intel.com> > --- > drivers/cxl/core/pci.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c > index 8d92a24fd73d..97adf9a7ea89 100644 > --- a/drivers/cxl/core/pci.c > +++ b/drivers/cxl/core/pci.c > @@ -377,7 +377,7 @@ static bool __cxl_hdm_decode_init(struct cxl_dev_state *cxlds, > > if (!allowed && info->mem_enabled) { > dev_err(dev, "Range register decodes outside platform defined CXL ranges.\n"); > - return -ENXIO; > + return false; > } > > /* > -- > 2.45.2 >
On 11/15/24 7:11 AM, Dan Carpenter wrote: > When commit 0cab68720598 ("cxl/pci: Fix disabling memory if DVSEC CXL > Range does not match a CFMWS window") was backported, this chunk moved > from the cxl_hdm_decode_init() function which returns negative error > codes to the __cxl_hdm_decode_init() function which returns false on > error. So the error code needs to be modified from -ENXIO to false. > > This issue only exits in the 6.1.y kernels. In later kernels negative > error codes are correct and the driver didn't exist in earlier kernels. > > Fixes: 031217128990 ("cxl/pci: Fix disabling memory if DVSEC CXL Range does not match a CFMWS window") > Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Dave Jiang <dave.jiang@intel.com> > --- > drivers/cxl/core/pci.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c > index 8d92a24fd73d..97adf9a7ea89 100644 > --- a/drivers/cxl/core/pci.c > +++ b/drivers/cxl/core/pci.c > @@ -377,7 +377,7 @@ static bool __cxl_hdm_decode_init(struct cxl_dev_state *cxlds, > > if (!allowed && info->mem_enabled) { > dev_err(dev, "Range register decodes outside platform defined CXL ranges.\n"); > - return -ENXIO; > + return false; > } > > /*
diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c index 8d92a24fd73d..97adf9a7ea89 100644 --- a/drivers/cxl/core/pci.c +++ b/drivers/cxl/core/pci.c @@ -377,7 +377,7 @@ static bool __cxl_hdm_decode_init(struct cxl_dev_state *cxlds, if (!allowed && info->mem_enabled) { dev_err(dev, "Range register decodes outside platform defined CXL ranges.\n"); - return -ENXIO; + return false; } /*
When commit 0cab68720598 ("cxl/pci: Fix disabling memory if DVSEC CXL Range does not match a CFMWS window") was backported, this chunk moved from the cxl_hdm_decode_init() function which returns negative error codes to the __cxl_hdm_decode_init() function which returns false on error. So the error code needs to be modified from -ENXIO to false. This issue only exits in the 6.1.y kernels. In later kernels negative error codes are correct and the driver didn't exist in earlier kernels. Fixes: 031217128990 ("cxl/pci: Fix disabling memory if DVSEC CXL Range does not match a CFMWS window") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> --- drivers/cxl/core/pci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)