| Message ID | 20190521121721.32010-1-gwan-gyeong.mun@intel.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | drm/i915/dp: Support for DP YCbCr4:2:0 outputs | expand |
On Tue, 21 May 2019, Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> wrote: > On Gen 11 platform, to enable resolutions like 5K@120 (or higher) we need > to use DSC (DP 1.4) or YCbCr4:2:0 (DP 1.3 or 1.4) on DP. > In order to support YCbCr4:2:0 on DP we need to program YCBCR 4:2:0 > to MSA and VSC SDP. > And Link M/N values are calculated and applied based on the Full Clock > forYCbCr420. > The Bit per Pixel needs to be adjusted for YUV420 mode as it requires only > half of the RGB case. > - Link M/N values are calculated and applied based on the Full Clock > - Data M/N values needs to be calculated considering the data is half > due to subsampling > > These patches add a VSC structure for handling Pixel Encoding/Colorimetry > Formats and program YCBCR 4:2:0 to MSA and VSC SDP. And it changes a link > bandwidth computation for DP. Thanks for the patches, pushed to dinq with Laurent's and Maarten's acks to queue patch 2 via drm-intel. BR, Jani.
On Gen 11 platform, to enable resolutions like 5K@120 (or higher) we need to use DSC (DP 1.4) or YCbCr4:2:0 (DP 1.3 or 1.4) on DP. In order to support YCbCr4:2:0 on DP we need to program YCBCR 4:2:0 to MSA and VSC SDP. And Link M/N values are calculated and applied based on the Full Clock forYCbCr420. The Bit per Pixel needs to be adjusted for YUV420 mode as it requires only half of the RGB case. - Link M/N values are calculated and applied based on the Full Clock - Data M/N values needs to be calculated considering the data is half due to subsampling These patches add a VSC structure for handling Pixel Encoding/Colorimetry Formats and program YCBCR 4:2:0 to MSA and VSC SDP. And it changes a link bandwidth computation for DP. These patches tested on below test environment. Test Environment: - Tested System: Gen11 platform - Monitor: Wasabi Mango UHD430 REAL4K HDMI 2.0 Slim HDR DUAL DP i20 (This monitor supports HDMI YCbCr 4:2:0) - DP to HDMI Adaptor (Dongle) : Club3D CAC-1080 (This dongle supports DP YCbCr 4:2:0 pass through feature.) - To enable DP YCbCr 4:2:0 forcely, test enviromnent uses work arounds patches. You can find these on https://gitlab.freedesktop.org/elongbug/drm-tip/tree/dp_ycbcr420_work The idea of a scaling (RGB -> YCbCr4:4:4 -> YCbCr 4:2:0) is to follow the same approach used in YCbCr 4:2:0 on HDMI. v2: Addressed Maarten's review comments, fixed minor coding and block comment style. And reordered a first patch ("drm/i915/dp: Support DP ports YUV 4:2:0 output to GEN11") as a last patch. v3: Addressed Ville's review comments. Style fixed with few naming. If lscon is active, it makes not to call intel_dp_ycbcr420_config() to avoid to clobber of lspcon_ycbcr420_config() routine. And it move the 420_only check into the intel_dp_ycbcr420_config(). Remove a changing of pipe_bpp on intel_ddi_set_pipe_settings(). Because the pipe is running at the full bpp, keep pipe_bpp as RGB even though YCbCr 4:2:0 output format is used. Add a link bandwidth computation for YCbCr4:2:0 output format. v4: Fix uninitialized return value which is reported by Dan Carpenter. v5: Addressed reivew comments from Ville. In order to make codes simple, it adds and uses intel_dp_output_bpp() function. In order to avoid the extra indentation, it inverts if-clause on intel_dp_ycbcr420_config(). Remove the error print where no errors print are allowed. v6: Link M/N values are calculated and applied based on the Full Clock for YCbCr420. The Bit per Pixel needs to be adjusted for YUV420 mode as it requires only half of the RGB case. - Link M/N values are calculated and applied based on the Full Clock - Data M/N values needs to be calculated considering the data is half due to subsampling Remove a doubling of pixel clock on a dot clock calculator for DP YCbCr 4:2:0. Rebase and remove a duplicate setting of vsc_sdp.DB17. Add a setting of dynamic range bit to vsc_sdp.DB17. Change Content Type bit to "Graphics" from "Not defined". Change a dividing of pipe_bpp to muliplying to constant values on a switch-case statement. Fix an wrong setting of MSA MISC1 fields for Pixel Encoding/Colorimetry Format indication. As per DP 1.4a spec Table 2-96 [MSA MISC1 and MISC0 Fields for Pixel Encoding/Colorimetry Format Indication] When MISC1, bit 6, is Set to 1, a Source device uses a VSC SDP to indicate the Pixel Encoding/Colorimetry Format. On the wrong version it set a bit 5 of MISC1, now it set a bit 6 of MISC1. v7: Addressed review comments from Ville. Move intel_dp_get_colorimetry_status() to intel_dp from intel_psr. Move a setting of dynamic range bit and a setting of bpc which is based on pipe_bpp to a "drm/i915/dp: Program VSC Header and DB for Pixel Encoding/Colorimetry Format" commit. Change Content Type bit to "Not defined" from "Graphics". Fix non-standard comment format. Remove a referring to specific commit. Remove duplicated checking of connector's ycbcr_420_allowed from intel_pixel_encoding_setup_vsc(). v8: A missing of setting bpc to VSC setup is the pretty fatal case, it replaces DRM_DEBUG_KMS() to MISSING_CASE(). [Maarten] v9: Rename a member value name DB to db on struct dp_sdp [Laurent] References: https://patchwork.freedesktop.org/series/56059/ Gwan-gyeong Mun (6): drm/i915/dp: Add a config function for YCBCR420 outputs drm: Rename struct edp_vsc_psr to struct dp_sdp drm/i915/dp: Program VSC Header and DB for Pixel Encoding/Colorimetry Format drm/i915/dp: Add a support of YCBCR 4:2:0 to DP MSA drm/i915/dp: Change a link bandwidth computation for DP drm/i915/dp: Support DP ports YUV 4:2:0 output to GEN11 .../drm/bridge/analogix/analogix_dp_core.c | 12 +- .../drm/bridge/analogix/analogix_dp_core.h | 2 +- .../gpu/drm/bridge/analogix/analogix_dp_reg.c | 10 +- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_ddi.c | 12 +- drivers/gpu/drm/i915/intel_dp.c | 156 +++++++++++++++++- drivers/gpu/drm/i915/intel_dp.h | 1 + drivers/gpu/drm/i915/intel_drv.h | 2 + drivers/gpu/drm/i915/intel_psr.c | 12 +- include/drm/drm_dp_helper.h | 33 ++-- 10 files changed, 205 insertions(+), 36 deletions(-)