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dkim=none (message not signed) header.d=none; lists.freedesktop.org; dmarc=none action=none header.from=amd.com; Received: from BL0PR12MB4948.namprd12.prod.outlook.com (2603:10b6:208:1cc::20) by MN2PR12MB4438.namprd12.prod.outlook.com (2603:10b6:208:267::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4065.21; Thu, 22 Apr 2021 01:31:14 +0000 Received: from BL0PR12MB4948.namprd12.prod.outlook.com ([fe80::70f5:99ed:65a1:c033]) by BL0PR12MB4948.namprd12.prod.outlook.com ([fe80::70f5:99ed:65a1:c033%7]) with mapi id 15.20.3933.040; Thu, 22 Apr 2021 01:31:14 +0000 From: Felix Kuehling To: amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [PATCH v2 00/10] Implement multi-GPU DMA mappings for KFD Date: Wed, 21 Apr 2021 21:30:48 -0400 Message-Id: <20210422013058.6305-1-Felix.Kuehling@amd.com> X-Mailer: git-send-email 2.31.1 X-Originating-IP: [165.204.55.251] X-ClientProxiedBy: YT1PR01CA0027.CANPRD01.PROD.OUTLOOK.COM (2603:10b6:b01::40) To BL0PR12MB4948.namprd12.prod.outlook.com (2603:10b6:208:1cc::20) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from Harpoon.amd.com (165.204.55.251) by YT1PR01CA0027.CANPRD01.PROD.OUTLOOK.COM (2603:10b6:b01::40) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4042.21 via Frontend Transport; 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One SG-BO per GPU is needed to maintain the DMA mappings of each BO. Changes in v2: - Made the original BO parent of the SG BO to fix bo destruction order - Removed individualiation hack that is, not needed with parent BO - Removed resv locking hace in amdgpu_ttm_unpopulate, not needed without the individualization hack - Added a patch to enable the Intel IOMMU driver in rock-dbg_defconfig - Added a patch to move dmabuf attach/detach into backend_(un)bind I'm still seeing some IOMMU access faults in the eviction test. They seem to be related to userptr handling. They happen even without this patch series on a single-GPU system, where this patch series is not needed. I believe this is an old problem in KFD or amdgpu that is being exposed by device isolation from the IOMMU. I'm debugging it, but it should not hold up this patch series. "drm/ttm: Don't count pages in SG BOs against pages_limit" was already applied to drm-misc (I think). I'm still including it here because my patches depend on it. Without that, the SG BOs created for DMA mappings cause many tests fail because TTM incorrectly thinks it's out of memory. Felix Kuehling (10): rock-dbg_defconfig: Enable Intel IOMMU drm/amdgpu: Rename kfd_bo_va_list to kfd_mem_attachment drm/amdgpu: Keep a bo-reference per-attachment drm/amdgpu: Simplify AQL queue mapping drm/amdgpu: Add multi-GPU DMA mapping helpers drm/amdgpu: DMA map/unmap when updating GPU mappings drm/amdgpu: Move kfd_mem_attach outside reservation drm/amdgpu: Add DMA mapping of GTT BOs drm/ttm: Don't count pages in SG BOs against pages_limit drm/amdgpu: Move dmabuf attach/detach to backend_(un)bind arch/x86/configs/rock-dbg_defconfig | 11 +- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h | 18 +- .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 530 ++++++++++++------ drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 51 +- drivers/gpu/drm/ttm/ttm_tt.c | 27 +- 5 files changed, 437 insertions(+), 200 deletions(-)