[v5,0/7] drm: sun4i: dsi: Convert drm bridge

Message

Jagan Teki Nov. 22, 2021, 6:52 a.m. UTC

This series convert Allwinner DSI controller to full functional 
drm bridge driver for supporting all variants of DSI devices.

Here, are the previous version changes[1].

Patch 1: Drop the DRM bind race while attaching bridges

Patch 2: Move component_add into sun6i_dsi_attach

Patch 3: Convert the encoder to bridge driver

Patch 4: Add mode_set API

Patch 5: Enable DSI Panel

Patch 6: Enable DSI Bridge

Patch 7: Enable DSI Bridge (I2C)

[1] https://www.spinics.net/lists/arm-kernel/msg883560.html

Any inputs?
Jagan.

Jagan Teki (7):
  drm: sun4i: dsi: Drop DRM bind race with bridge attach
  drm: sun4i: dsi: Add component only once DSI device attached
  drm: sun4i: dsi: Convert to bridge driver
  drm: sun4i: dsi: Add mode_set function
  [DO NOT MERGE] ARM: dts: sun8i: bananapi-m2m: Enable S070WV20-CT16 Panel
  [DO NOT MERGE] ARM: dts: sun8i: bananapi-m2m: Enable ICN6211 DSI Bridge
  [DO NOT MERGE] ARM: dts: sun8i: Enable DLPC3433 Bridge (I2C)

 arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts |  63 ++++++
 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c       | 225 ++++++++++++-------
 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h       |   9 +-
 3 files changed, 218 insertions(+), 79 deletions(-)

Comments

Jagan Teki Nov. 22, 2021, 6:52 a.m. UTC | #1

Signed-off-by: Jagan Teki <[e-mail]>
---
 arch/arm/boot/dts/sun8i-r16-renew-vista-e.dts | 79 +++++++++++++++++--
 1 file changed, 73 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-r16-renew-vista-e.dts b/arch/arm/boot/dts/sun8i-r16-renew-vista-e.dts
index d28b7b35a3c5..c3ee6a879ddb 100644
@@ -108,6 +102,17 @@ sel-lvds-mux {
 		};
 	};
 
+	panel {
+		compatible = "ti,dlpa3000a-720p";
+		/* backlight not required */
+
+		port {
+			panel_out_bridge: endpoint {
+				remote-endpoint = <&bridge_out_panel>;
+			};
+		};
+	};
+
 	reg_vcc5v0: vcc5v0 {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc5v0";
@@ -147,6 +152,32 @@ &dai {
 	status = "okay";
 };
 
+&de {
+	status = "okay";
+};
+
+&dphy {
+	status = "okay";
+};
+
+&dsi {
+	vcc-dsi-supply = <&reg_dcdc1>;		/* VCC-DSI */
+	status = "okay";
+
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+
+			dsi_out_bridge: endpoint {
+				remote-endpoint = <&bridge_out_dsi>;
+			};
+		};
+	};
+};
+
 &ehci0 {
 	status = "okay";
 };
@@ -154,6 +185,38 @@ &ehci0 {
 &i2c1 {
 	clock-frequency = <100000>;
 	status = "okay";
+
+	bridge@1d {
+		compatible = "ti,dlpc3433";
+		reg = <0x1d>;
+		enable-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>;
+		vcc-supply = <&reg_dldo1>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			bridge_in: port@0 {
+				reg = <0>;
+
+				bridge_out_dsi: endpoint {
+					remote-endpoint = <&dsi_out_bridge>;
+					data-lanes = <0 1 2 3>;
+				};
+			};
+
+			bridge_out: port@1 {
+				reg = <1>;
+
+				bridge_out_panel: endpoint {
+					remote-endpoint = <&panel_out_bridge>;
+				};
+			};
+		};
+	};
 };
 
 &i2c2 {
@@ -321,6 +384,10 @@ &sound {
 		"Right DAC", "AIF1 Slot 0 Right";
 };
 
+&tcon0 {
+	status = "okay";
+};
+
 &uart0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart0_pb_pins>;