| Message ID | 20220331150509.9838-1-marex@denx.de (mailing list archive) |
|---|---|
| Headers | show |
| Series | drm: bridge: icn6211: Fix hard-coded panel settings and add I2C support | expand |
On Thu, 31 Mar 2022 at 17:05, Marek Vasut <marex@denx.de> wrote: > > This series fixes multiple problems with the ICN6211 driver and adds > support for configuration of the chip via I2C bus. > > First, in the current state, the ICN6211 driver hard-codes DPI timing > and clock settings specific to some unknown panel. The settings provided > by panel driver are ignored. Using any other panel than the one for which > this driver is currently hard-coded can lead to permanent damage of the > panel (per display supplier warning, and it sure did in my case. The > damage looks like multiple rows of dead pixels at the bottom of the > panel, and this is not going away even after long power off time). > > Much of this series thus fixes incorrect register layout, DPI timing > programming, clock generation by adding actual PLL configuration code. > This series no longer adds lane count decoding and retains current > hard-coded lane count 4 due to disagreement over lane count parsing > from DT. The lane count support will come later. The series also fills > in a couple of registers with likely correct default values. > > Second, this series adds support for I2C configuration of the ICN6211. > The device can be configured either via DSI command mode or via I2C, > the register layout is the same in both cases. > > Since the datasheet for this device is very hard to come by, a lot of > information has been salvaged from [1] and [2]. > > [1] https://github.com/rockchip-linux/kernel/blob/develop-4.19/drivers/gpu/drm/bridge/icn6211.c > [2] https://github.com/tdjastrzebski/ICN6211-Configurator > > Cc: Jagan Teki <jagan@amarulasolutions.com> > Cc: Maxime Ripard <maxime@cerno.tech> > Cc: Robert Foss <robert.foss@linaro.org> > Cc: Sam Ravnborg <sam@ravnborg.org> > Cc: Thomas Zimmermann <tzimmermann@suse.de> > To: dri-devel@lists.freedesktop.org > > Marek Vasut (11): > drm: bridge: icn6211: Fix register layout > drm: bridge: icn6211: Fix HFP_HSW_HBP_HI and HFP_MIN handling > drm: bridge: icn6211: Add HS/VS/DE polarity handling > drm: bridge: icn6211: Add generic DSI-to-DPI PLL configuration > drm: bridge: icn6211: Use DSI burst mode without EoT and with LP > command mode > drm: bridge: icn6211: Disable DPI color swap > drm: bridge: icn6211: Set SYS_CTRL_1 to value used in examples > drm: bridge: icn6211: Implement atomic_get_input_bus_fmts > drm: bridge: icn6211: Add I2C configuration support > drm: bridge: icn6211: Rework ICN6211_DSI to chipone_writeb() > drm: bridge: icn6211: Read and validate chip IDs before configuration > > drivers/gpu/drm/bridge/chipone-icn6211.c | 491 ++++++++++++++++++++--- > 1 file changed, 437 insertions(+), 54 deletions(-) > > -- > 2.35.1 > Applied to drm-misc-next.
This series fixes multiple problems with the ICN6211 driver and adds support for configuration of the chip via I2C bus. First, in the current state, the ICN6211 driver hard-codes DPI timing and clock settings specific to some unknown panel. The settings provided by panel driver are ignored. Using any other panel than the one for which this driver is currently hard-coded can lead to permanent damage of the panel (per display supplier warning, and it sure did in my case. The damage looks like multiple rows of dead pixels at the bottom of the panel, and this is not going away even after long power off time). Much of this series thus fixes incorrect register layout, DPI timing programming, clock generation by adding actual PLL configuration code. This series no longer adds lane count decoding and retains current hard-coded lane count 4 due to disagreement over lane count parsing from DT. The lane count support will come later. The series also fills in a couple of registers with likely correct default values. Second, this series adds support for I2C configuration of the ICN6211. The device can be configured either via DSI command mode or via I2C, the register layout is the same in both cases. Since the datasheet for this device is very hard to come by, a lot of information has been salvaged from [1] and [2]. [1] https://github.com/rockchip-linux/kernel/blob/develop-4.19/drivers/gpu/drm/bridge/icn6211.c [2] https://github.com/tdjastrzebski/ICN6211-Configurator Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Maxime Ripard <maxime@cerno.tech> Cc: Robert Foss <robert.foss@linaro.org> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Thomas Zimmermann <tzimmermann@suse.de> To: dri-devel@lists.freedesktop.org Marek Vasut (11): drm: bridge: icn6211: Fix register layout drm: bridge: icn6211: Fix HFP_HSW_HBP_HI and HFP_MIN handling drm: bridge: icn6211: Add HS/VS/DE polarity handling drm: bridge: icn6211: Add generic DSI-to-DPI PLL configuration drm: bridge: icn6211: Use DSI burst mode without EoT and with LP command mode drm: bridge: icn6211: Disable DPI color swap drm: bridge: icn6211: Set SYS_CTRL_1 to value used in examples drm: bridge: icn6211: Implement atomic_get_input_bus_fmts drm: bridge: icn6211: Add I2C configuration support drm: bridge: icn6211: Rework ICN6211_DSI to chipone_writeb() drm: bridge: icn6211: Read and validate chip IDs before configuration drivers/gpu/drm/bridge/chipone-icn6211.c | 491 ++++++++++++++++++++--- 1 file changed, 437 insertions(+), 54 deletions(-)